Solid understanding of digital design concepts, micro architecture.
Hands on experience on front end implementation tools for Lint, CDC. Knowledge of concepts for Equivalence Check, Synthesis & STA, Power estimation tools.
Hands on experience on IP level verification or unit testing
Good understanding of the entire ASIC design flow involving logic design, verification, synthesis, timing and backend.
Understanding of ASIC synthesis, constraints development & analysis, STA, & DFT.
Hands on experience or good understanding of gate level simulations
Must be able to work autonomously and guide others based on changing priorities.
Ability to learn, adapt & improve on to new methodologies and technologies.
Experience in high speed design and communications such as I2C, UART, SPI.
Excellent analytical and debugging skills and the ability to proactively solve issues.
Must be a highly motivated with good aptitude and attitude.
Good cross functional collaboration, communication & interpersonal skills.
Knowledge of protocols such as HDMI, DP, MIPI, ethernet protocols an added advantage.
Knowledge of functional safety design an added advantage.
BE/B.Tech/M.E/M.Tech in EE/ECE with a minimum of 7+ years of relevant work experience.