Validation, Bring-Up, and Debugging: Develop and execute validation plans for your assigned subsystems, spanning board-level and FPGA-level testing. Build test fixtures and use lab equipment (high-bandwidth oscilloscopes, protocol analyzers, logic analyzers) to validate latency, bandwidth, and synchronization requirements. Debug across the hardware/RTL boundary — link training failures, timing violations, ISP misconfiguration, power sequencing faults — using rigorous, first-principles root-cause analysis, escalating and collaborating with technical leads on cross-subsystem issues.