Find jobs
Pricing
Sign in
FIND JOBSPRICINGSIGN INSIGN UP
← Back
MA
Marvell

Principal Engineer, Design Verification

LocationHo Chi Minh
Work modeon-site
Typefull-time
DepartmentEngineering
EquityIncluded
Company size10,000+ people
First seen1w ago
Last seen1d ago
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for innovative storage technologies, including ultra‐fast read channels, high‐performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid‐state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.
What You Can Expect
• Develop and implement verification plans for read channel storage IP designs.
• Create and maintain testbenches using industry-standard verification tools and methodologies.
• Perform functional and performance verification of complex digital designs.
• Collaborate with design and architecture teams to identify and resolve design issues.
• Analyze and debug simulation failures and provide detailed reports on verification results.
• Mentor and guide junior verification engineers.
What We’re Looking For
• BS/MS/PhD Degree in Electrical Engineering / Computer Engineering / Electronics and Telecommunications Engineering, or a related field.
• Proficiency in verification languages such as SystemVerilog, UVM, and scripting languages (Python, Perl, etc.).
• Understanding of ASIC design flow, strong understanding of digital design and verification methodologies.
• Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor Graphics).
• Strong mathematical skills.
• Experience with Digital Signal Processing (DSP) and knowledge of DSP modeling in C/C++.
• Strong problem-solving skills.
• Fluent in English language, excellent communication skills,
• Preferred Qualifications: Experience with high-speed DSP design verification.
Additional Compensation and Benefit Elements
•
Competitive salary, plus 13th-month salary and performance-based bonus
•
RSUs (Restricted Stock Units) for new joiners and on-going annually
•
Premium health & accident insurance for you and your family (spouse and children)
•
Annual medical check-up at a designated hospital arranged by Marvell
•
Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
•
Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.
Legal
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
#LI-UN1
More roles at Marvell
SRAM Software Engineer Intern, BS - Summer 2027Director Gross Margin Program ManagementSenior Staff Embedded Device Software EngineerHardware Board Design Senior Staff EngineerPrincipal Analog/Mixed Signal CAD Engineer
Seekless
Product
Find jobsCompaniesPricing
Legal
PrivacyTermsCookies
© 2026 SEEKLESS, INC. ALL RIGHTS RESERVED.BUILT WITH CARE