• BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium)
• Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
• Proficiency in hardware debug tools, waveform viewers, and logic analyzers
• Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure development