As a Senior Advanced Packaging/MEMS Process Engineer you’ll apply advanced semiconductor and microelectromechanical systems (MEMS) process engineering knowledge, theory, and methods to research, design, develop, and qualify processes for Heterogeneous System Integration Package (HSIP) and Fan-Out Wafer-Level (FOWL) technologies.
What You’ll Do:
● Support end-to-end copper electroplating process development to achieve HMLV yield and reliability targets.
● Define copper etch process optimization for fine-line patterning and DBI pre-bond surface preparation.
Optimize and maintain processes like:
• Wet and Dry etch tools
• Vacuum/Sputter systems
• Metrology tools
● Work with cross functional teams to develop new processes for new business, make process improvements, troubleshoot issues, and maintain process uptime
● Shares performance experience and operating characteristics with designers or other engineers for new product development purposes and/or training.
stem Integration Package (HSIP)
● Fan-Out Wafer-Level (FOWL) technologies
You’ll interact with integration, assembly, quality, and equipment engineering teams to drive high-mix | low-volume manufacturing readiness for 2.5D/3D chiplet integration.