We are seeking a highly skilled and experienced Defect Reduction Engineer to drive yield enhancement and process stability within our advanced semiconductor fabrication environment. This critical role focuses on the identification, analysis, and elimination of defect sources across multiple technology nodes, ranging from legacy production to leading-edge 14nm and foundry processes. The successful candidate will serve as the primary subject matter expert in defectivity, ensuring that our manufacturing processes meet the highest standards of quality and performance.
The core of this position involves leading Defect Reduction strategies for New Product Introduction (NPI), where you will independently define inline inspection methodologies and establish robust monitoring plans. You will be responsible for performing deep-dive correlation analyses of tool trend data to identify underperforming equipment and rapidly mitigate process excursions. By leveraging advanced inspection tools (Bright Field, Dark Field, E-beam) and analytical platforms like Klarity, you will trace defects to their root cause and implement permanent corrective actions.
Collaboration is central to this role. You will work autonomously yet synchronously with cross-functional teams, including Yield Enhancement (YE), Process Integration (PIE), and Unit Process (UP) engineering, to establish Best Known Methods (BKMs) and drive the reduction of “Single Wafer Low Yield” (SWLY) occurrence. Additionally, you will act as a key technical liaison for foundry customers and support the seamless transfer of new technologies from Samsung HQ in South Korea.
The ideal candidate is a self-starter with a minimum of 5 years of semiconductor working experience and a proven track record of solving chronic yield issues in a fast-paced environment. We are looking for a technical leader who can integrate quickly into our operations, manage multiple shifting priorities, and deliver results that directly impact our yield goals and product competitiveness.