RTL Design Engineer
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Before you apply
SalaryNo pay range posted
LocationSan Jose
Work modeon-site
Typefull-time
SenioritySenior
Experience5+ yrs
DepartmentASIC
Company size501–1,000 people
PostedJun 11, 2025 · 1y ago
Verified live1d ago
May no longer be actively hiring
Posted by the company on Jun 11, 202556% of this company's open roles have been listed for 90+ daysNo pay range listed, though California requires one
At a glanceSummarised by Seekless from the posting.
At least 5 years of work experience in RTL development.
Experience with high-speed digital logic.
Proficiency in standard RTL design and synthesis tools
Familiarity with verification work and writing test benches
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Willing to start quickly
Experience with PCIe, Ethernet, or HBM technologies
Familiarity with modern ML and LLM model architectures.
Familiarity with numerical representations and functions
Ability to program with Python or another scripting language
Skills
Python
PCIe
Ethernet
HBM
Benefits
Health insurance
Dental insurance
Vision insurance
Housing subsidy
Relocation assistance
Wellness benefits
Meal benefits
Unlimited compute budget
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.
In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched’s success.
Representative projects
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Implement a block to efficiently compute floating point math operators
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Provide feedback to the uArch team to make sure blocks meet timing and area constraints
You may be a good fit if you
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At least 5 years of work experience in RTL development.
•
Experience with high-speed digital logic.
•
Proficiency in standard RTL design and synthesis tools
•
Familiarity with verification work and writing test benches
•
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
•
Willing to start quickly
Strong candidates may also have experience with (Nice-to-have qualifications)
•
Experience with PCIe, Ethernet, or HBM technologies
•
Familiarity with modern ML and LLM model architectures.
•
Familiarity with numerical representations and functions
•
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
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Medical, dental, and vision packages with generous premium coverage
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$500 per month credit for waiving medical benefits
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Housing subsidy of $2.5k per month for those living within walking distance of the office
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Relocation support for those moving to San Jose (Santana Row)
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Various wellness benefits covering fitness, mental health, and more
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Daily lunch + dinner in our office
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Unlimited compute budget subject to ROI justification
How we’re different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.