Principal Analog IC Layout Engineer
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Before you apply
LocationNijmegen
Typefull-time
SeniorityLead
Company size10,000+ people
PostedOct 1, 2026 · 1mo ago
Verified live2d ago
At a glanceSummarised by Seekless from the posting.
Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics
Extensive experience in Analog IC Layout
Expertise with Cadence Virtuoso, Calibre and sign-off methodologies
Strong experience in mixed-signal and power management products
Proven track record delivering complex developments from concept to tape-out
Excellent communication and technical leadership skills
Fluent English
BCD and High Voltage technology expertise
Reliability, ESD and EMC layout experience
Automation and scripting experience
Experience driving cross-site engineering collaboration
Automotive semiconductor experience
Skills
Cadence Virtuoso
Calibre
About the Team
About the role
NXP Semiconductors is seeking a Principal Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS).
The role will support multiple automotive and industrial product lines worldwide and contribute to the successful development of advanced mixed-signal and power management semiconductor solutions.
Role Summary
The successful candidate will provide senior technical expertise in Analog IC Layout, driving complex developments across multiple projects while contributing to technology deployment, layout methodologies and organizational capability growth.
Key Responsibilities
Layout and Technology Leadership
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Lead complex Analog and Mixed-Signal layout developments.
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Drive floorplanning and top-level implementation strategies.
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Support deployment of new technologies and layout methodologies.
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Ensure high quality and manufacturable layout solutions.
Project and Product Support
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Support multiple projects simultaneously.
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Identify and mitigate layout-related project risks.
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Drive technical reviews and sign-off readiness.
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Contribute to silicon bring-up support and root-cause analysis activities.
Methodology and Community Development
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Drive continuous improvement initiatives.
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Develop and promote layout best practices.
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Contribute to training and mentoring of engineers.
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Support worldwide alignment on methodologies and standards.
Required Skills
•
Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics.
•
Extensive experience in Analog IC Layout.
•
Expertise with Cadence Virtuoso, Calibre and sign-off methodologies.
•
Strong experience in mixed-signal and power management products.
•
Proven track record delivering complex developments from concept to tape-out.
•
Excellent communication and technical leadership skills.
•
Fluent English.
Preferred Qualifications
•
BCD and High Voltage technology expertise.
•
Reliability, ESD and EMC layout experience.
•
Automation and scripting experience.
•
Experience driving cross-site engineering collaboration.
•
Automotive semiconductor experience.
More information about NXP in the Netherlands…