Technical Director - FE
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Before you apply
LocationNoida
Work modeon-site
Typefull-time
SenioritySenior
Experience15–20 yrs
DepartmentEngineering
Company size10,000+ people
PostedOct 28, 2026 · 1w ago
Verified live1d ago
At a glanceSummarised by Seekless from the posting.
Master/Bachelor's Degree in Electrical/Electronic Engineering
Senior SoC Architects, ASIC designers and Design Leads with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design and verification, Timing Analysis, DFT and Implementation
Experience 15-20 Years in IP/SOC design with successful delivery of production quality chips
Hands-on experience on Chip Assembly, RTL Design, IP Integration, RTL signoff tools (Questa/Spyglass, Fusion Compiler, Genus, CLP/VCLP) & Debussy
Strong domain knowledge of Clocking, System modes, Power management, debug, interconnect, safety, security and other architectures
Know-how of Serial Interfaces, Multimedia, External Bus Interfaces
Excellent written and verbal communication skill
Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components
Should be a team player and willing to work with cross functional teams in issues resolution
Familiarity with Computer architecture: knowledge of microprocessors, bus protocols AXI/AHB/APB/ATB preferred
Applicants must be willing to work in Noida
Skills
RTL Design
System on Chip
Specification/Micro-architecture
Design and Verification
Timing Analysis
DFT
Implementation
Chip Assembly
IP Integration
Questa
Spyglass
Fusion Compiler
Genus
CLP
VCLP
Debussy
AXI
AHB
APB
ATB
Clocking
System modes
Power management
Debug
Interconnect
Safety
Security
Serial Interfaces
Multimedia
External Bus Interfaces
RTL Engineer
Job Location-Noida
About the company
You will be a part of the ACE engineering team which is a global leader in the design, manufacturing and marketing of microcontrollers and embedded processors in the Automotive, Industrial & IOT, Datacenter, Robotics and Radar markets.
Responsibilities
•
Job Description Summary
•
U-arch definition from high level specifications
•
Hand-on design, architecture and integration of the System on Chip (SOC) from initial specification till tapeout and beyond.
•
Signing off RTL, timing constraints, CDC and work with different functions like verification, synthesis, etc. to get to a production quality Silicon
•
Documenting the SOC design and micro-architecture for usage by other SOC functions
•
Addressing design related queries from customers
Job Description
Department Description
You will be a part of the ACE engineering team which is a global leader in the design, manufacturing and marketing of microcontrollers and embedded processors in the Automotive, Industrial & IOT, Datacenter, Robotics and Radar markets
ACE is a centralized engineering organization catering to to NXP business units . NXP is the world’s No. 1 supplier of semiconductors to global auto manufacturers, microcontrollers (MCUs) and embedded processors . We provide comprehensive design solutions, including software, development tools, application support, training, documentation and reference platforms, enabling our customers to rapidly go to market.
Scope of Responsibilities/Expectations
•
Hands-on design, architecture and integration of the System on Chip (SOC) from initial specification till tapeout and beyond.
•
Signing off RTL, timing constraints, CDC and work with different functions like verification, synthesis, etc. to get to a production quality Silicon
•
Documenting the SOC design and micro-architecture for usage by other SOC functions
•
Addressing design related queries from customers
Specific Knowledge/Skills
•
Master/Bachelor’s Degree in Electrical/Electronic Engineering
•
Senior SoC Architects, ASIC designers and Design Leads with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design and verification, Timing Analysis, DFT and Implementation.
•
Experience 15-20 Years in IP/SOC design with successful delivery of production quality chips
•
Hands-on experience on Chip Assembly, RTL Design, IP Integration, RTL signoff tools (Questa/Spyglass, Fusion Compiler, Genus, CLP/VCLP) & Debussy.
•
Familiarity with Computer architecture: knowledge of microprocessors, bus protocols AXI/AHB/APB/ATB preferred.
•
Strong domain knowledge of Clocking, System modes, Power management, debug, interconnect, safety, security and other architectures
•
Know-how of Serial Interfaces, Multimedia, External Bus Interfaces,.
•
Excellent written and verbal communication skill
•
Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components
•
Should be a team player and willing to work with cross functional teams in issues resolution
•
Applicants must be willing to work in Noida
More information about NXP in India…