Strong understanding of ARM and/or MIPS CPU architectures and subsystem integration
Deep understanding of SoC architecture and integration, memory hierarchies and DMA, interrupt and coherency mechanisms, high-performance interconnect behavior
Extensive experience with industry-standard simulators and debug tools: VCS, Questa, Xcelium
Strong scripting and automation expertise using Python, Perl, Tcl, or equivalent
Excellent analytical, debugging, communication, and technical leadership skills
Nice to have5
Experience with SoC-level verification closure, multi-IP subsystem integration
Exposure to AI/ML-based verification tools for intelligent debug, coverage optimization, automated failure classification, test generation
Experience building or driving metrics-driven verification environments
Prior experience mentoring teams or leading technical initiatives across projects
Skills
SystemVerilog
UVM
Ethernet
PCIe
ARM
MIPS
AXI
AHB
APB
Python
Perl
Tcl
VCS
Questa
Xcelium
About the company
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Position Overview
We are seeking an accomplished and technically strong Technical Staff Engineer – Verification to provide technical leadership for the verification of next-generation Ethernet Switch and PCIe Switch SoCs. This role is focused on complex, high-performance designs integrating Ethernet, PCIe, ARM/MIPS CPU subsystems, and AMBA-based interconnect fabrics (AXI/AHB/APB).
The ideal candidate will drive verification strategy and execution across IP, subsystem, and full-SoC levels using SystemVerilog UVM as the primary verification methodology. This role requires deep expertise in scalable verification architecture, coverage-driven methodologies, protocol compliance, and system-level debug.
As a senior technical leader, the candidate will influence verification methodologies, mentor engineers across teams, collaborate with architecture and design leadership, and help drive first-silicon success for complex networking and connectivity products. Experience leveraging AI-assisted engineering tools for verification productivity and debug acceleration is highly desirable.
Key Responsibilities
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Provide technical leadership for verification of complex Ethernet and PCIe Switch SoCs, including datapath, control-plane, management, and CPU subsystems.
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Define and drive verification architecture, methodologies, and best practices across projects and teams.
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Lead verification of ARM/MIPS CPU subsystems and AMBA-based interconnect fabrics including AXI, AXI-Lite, AHB, and APB.
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Architect scalable and reusable SystemVerilog UVM environments, agents, scoreboards, protocol checkers, and coverage frameworks.
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Drive comprehensive verification planning and execution covering:
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PCIe subsystem functionality:
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Link training and LTSSM
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Enumeration and configuration space
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Error handling and recovery
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NTB and hot-plug support
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AMBA protocol verification:
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Corner-case and error scenarios
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CPU subsystem validation:
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Boot and reset sequences
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Register access and RAL integration
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DMA and memory interactions
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Interrupt and timer verification
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Develop advanced constrained-random, directed, and scenario-based verification strategies for realistic traffic and system workloads.
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Drive functional, code, assertion, and cross-coverage closure with metrics-driven methodologies.
Experience building or driving metrics-driven verification environments.
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Prior experience mentoring teams or leading technical initiatives across projects.
Travel Time:
0% - 25%
Legal
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.