Principal Digital/Embedded Firmware Engineer
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Before you apply
Salary$108k – $195k
LocationSt. Petersburg, FL
Work modeon-site
Typefull-time
SeniorityLead
Experience8+ yrs
Company size10,000+ people
PostedOct 27, 2026 · 1w ago
Verified live1d ago
At a glanceSummarised by Seekless from the posting.
Ability to obtain and maintain a Secret Security Clearance
BS or MS in Electrical Engineering, Computer Engineering, or related field
8+ years of experience in embedded hardware and digital design (10+ preferred for Senior level)
Experience supporting full product development lifecycle including: Requirements analysis, System design and hardware implementation, Integration and test, Firmware/software architecture development for embedded systems including FPGAs and SoCs, Technical documentation and formal design reviews
Strong VHDL, FPGA/SoC design and implementation experience: Digital logic design using VHDL/Verilog with System-On-Chip devices (SoC’s), FPGA’s, CPLD/s, and/or Microcontrollers; Modern vendor design tools (IDE’s) such as Xilinx Vivado, Vitis, STM, Libero SoC, Lattice Diamond; Simulation and Testbench generation (Xilinx simulator, Aldec Active HDL, Riveria Pro, Modelsim, or similar); RISC microprocessors architectures (ARM Cortex, Microblaze, PowerPC, RISC-V); C/C++ language software development for embedded, real-time systems
Experience with one or more of: Integrating and troubleshooting digital subsystems within embedded systems; Digital interfaces such as I2C, SPI, RS-232/422, USB, Ethernet; ADC/DAC devices and understanding performance characteristics; Hands-on lab experience debugging hardware using oscilloscopes, logic analyzers, and related tools
Understand trade-offs of embedded system targets (FPGA, SoC, microcontroller, RTOS, bare-metal) for developing best cost/option architectures
Active Secret clearance preferred
Ability to obtain Top Secret clearance preferred
Active Secret or Top Secret clearance
Proven experience in full-stack FPGA development for Xilinx UltraScale/UltraScale+ architectures, spanning RTL design (VHDL/Verilog) and embedded C/C++ development for bare-metal, FreeRTOS, or embedded Linux environments (PetaLinux, etc)
Experience with one or more of: Design and development with other FPGA/CPLD vendors such as Microsemi, ST-Micro, Lattice, etc; High-speed interfaces/protocols such as PCIe, JESD204B, LVDS, and SERDES; Simulation and modeling tools (MATLAB, Python, LabVIEW); Implementing signal processing concepts such as digital filters, digital modulation, up/down conversion within HDL designs; IP cores and modern processor interfaces (Xilinx IP Cores, AXI4, AXI-Stream or similar); Design, integration and testing electronic circuits within embedded systems including digital, analog and radio frequency (RF) subsystems
Experience developing ruggedized or military communication systems
Experience with the Cooperative Engagement Capability Naval communications system
Experience transitioning prototype designs into production hardware
Familiar with schematic capture design tools (Altium, Cadence Allegro/OrCAD, Ki-CAD or equivalent)
U.S. Citizen required
Skills
VHDL
Verilog
FPGA
SoC
CPLD
microcontroller
Xilinx Vivado
Vitis
STM
Libero SoC
Lattice Diamond
Xilinx simulator
Aldec Active HDL
Riveria Pro
Modelsim
ARM Cortex
Microblaze
PowerPC
RISC-V
C
C++
I2C
SPI
RS-232
RS-422
USB
Ethernet
ADC
DAC
oscilloscope
logic analyzer
PetaLinux
MATLAB
Python
LabVIEW
Altium
Cadence Allegro
OrCAD
Ki-CAD
PCIe
JESD204B
LVDS
SERDES
About the role
The Defense Systems Group at Leidos has an immediate opening for a Principal Digital Firmware Design Engineer at our St. Petersburg, FL facility. This position supports the development of advanced, mission-critical military communications systems and involves the design, integration, testing, and optimization of secure, ruggedized electronic hardware and firmware for defense applications.
The ideal candidate will possess deep expertise in FPGA-based digital design and hands-on experience with integrating hardware and firmware within complex embedded systems. This individual will have a demonstrated track record supporting defense programs across the full product lifecycle—from requirements development and architectural design through integration, qualification testing, and transition to production.
About the company
The Leidos St. Petersburg facility specializes in the design, development, modeling and simulation, analysis, prototyping, and testing of advanced electronic systems. Our primary focus areas include embedded communications systems, Software Defined Radios (SDR), and Phased Array Antenna Systems supporting Department of Defense and commercial customers.
Responsibilities
Primary Responsibilities:
•
Participate in a multi-disciplinary engineering team developing secure, high-performance military communications hardware and firmware.
•
Analyze and decompose system-level requirements into detailed hardware design specifications with full traceability.
•
Perform Logic Design; write VHDL code, perform synthesis, logic simulation, test bench generation, functional testing and hardware debugging of designs within FPGA/CPLD devices.
•
Architect, implement and test embedded firmware /software within FPGA-based digital designs including signal processing, control logic, and high-speed interfaces on a variety of platforms (FPGAs, microcontrollers, microprocessors, and mixed signal designs).
•
Troubleshoot and resolve complex hardware, firmware / software and integration issues across prototype and production phases.
•
Support design reviews (SRR, PDR, CDR), technical documentation, and configuration management processes.
•
Provide technical input for cost estimates, schedules, and risk assessments.
•
Collaborate closely with Firmware, Software, RF, systems, and test engineering teams throughout the development lifecycle.
Requirements
Clearance Requirements:
•
U.S. Citizen required.
•
Ability to obtain and maintain a Secret Security Clearance.
•
Active Secret clearance preferred.
•
Ability to obtain Top Secret clearance preferred.
Required Qualifications:
•
BS or MS in Electrical Engineering, Computer Engineering, or related field.
•
8+ years of experience in embedded hardware and digital design (10+ preferred for Senior level).
•
Experience supporting full product development lifecycle including:
•
Requirements analysis, System design and hardware implementation, Integration and test
•
Firmware/software architecture development for embedded systems, including FPGAs and SoCs
•
Technical documentation and formal design reviews
•
Strong VHDL, FPGA/SoC design and implementation experience:
•
Digital logic design using VHDL/Verilog with System-On-Chip devices (SoC’s), FPGA’s, CPLD/s, and/or Microcontrollers.
•
Modern vendor design tools (IDE’s) such as Xilinx Vivado, Vitis, STM, Libero SoC, Lattice Diamond
•
Simulation and Testbench generation (Xilinx simulator, Aldec Active HDL, Riveria Pro, Modelsim, or similar)
•
RISC microprocessors architectures (ARM Cortex, Microblaze, PowerPC, RISC-V)
•
C/C++ language software development for embedded, real-time systems.
•
Experience with one or more of the following:
•
Integrating and troubleshooting digital subsystems within embedded systems.
•
Digital interfaces such as I2C, SPI, RS-232/422, USB, Ethernet
•
ADC/DAC devices and understanding performance characteristics.
•
Hands-on lab experience debugging hardware using oscilloscopes, logic analyzers, and related tools
•
Understand trade-offs of embedded system targets (FPGA, SoC, microcontroller, RTOS, bare-metal) for developing best cost/option architectures
Nice to have
Preferred Qualifications:
•
Active Secret or Top Secret clearance.
•
Proven experience in full-stack FPGA development for Xilinx UltraScale/UltraScale+ architectures, spanning RTL design (VHDL/Verilog) and embedded C/C++ development for bare-metal, FreeRTOS, or embedded Linux environments (PetaLinux, etc).
•
Experience with one or more of the following:
•
Design and development with other FPGA/CPLD vendors such as Microsemi, ST-Micro, Lattice, etc
•
High-speed interfaces/protocols such as PCIe, JESD204B, LVDS, and SERDES
•
Simulation and modeling tools (MATLAB, Python, LabVIEW)
•
Implementing signal processing concepts such as digital filters, digital modulation, up/down conversion within HDL designs
•
IP cores and modern processor interfaces (Xilinx IP Cores, AXI4, AXI-Stream or similar)
•
Design, integration and testing electronic circuits within embedded systems, including digital, analog and radio frequency (RF) subsystems.
•
Experience developing ruggedized or military communication systems
•
Experience with the Cooperative Engagement Capability Naval communications system.
•
Experience transitioning prototype designs into production hardware
•
Familiar with schematic capture design tools (Altium, Cadence Allegro/OrCAD, Ki-CAD or equivalent)
If you’re looking for comfort, keep scrolling. At Leidos, we outthink, outbuild, and outpace the status quo — because the mission demands it. We’re not hiring followers. We’re recruiting the ones who disrupt, provoke, and refuse to fail. Step 10 is ancient history. We’re already at step 30 — and moving faster than anyone else dares.
Original Posting:
October 27, 2026
For U.S. Positions: While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.
Pay Range:
Pay Range $107,900.00 - $195,050.00
The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.