Senior Analog Design Engineer
Salary$125k – $145k
LocationSan Diego, California, United States
Typefull-time
SenioritySenior
Experience5+ yrs
DepartmentResearch & Development
Company size51–200 people
PostedSep 3, 2026 · 1mo ago
Verified live19h ago
At a glanceSummarised by Seekless from the posting.
Bachelor's degree in Electrical Engineering or related field
5+ years of professional experience in analog IC design
Strong foundation in analog CMOS circuit design
Experience designing and analyzing feedback loops, including stability analysis and compensation
Solid understanding of the full IC development lifecycle, from design and verification through qualification and manufacturing
Hands on experience with analog and mixed signal EDA tools such as Cadence, Mentor Graphics, or Tanner
Experience performing LVS and DRC verification using Cadence or Mentor tools
Skills
CMOS
Cadence
Mentor Graphics
Tanner
LVS
DRC
About the role
As a Senior Analog Design Engineer, you will contribute to the design and optimization of analog circuits used in high performance ATE products. You will work closely with cross functional teams and take ownership of circuit blocks from concept through silicon validation.
In this role, you will apply strong analog design fundamentals to solve complex technical challenges, make design tradeoffs, and drive performance, reliability, and manufacturability. You will contribute throughout the full IC development lifecycle while collaborating with experienced engineers across design, layout, test, and product engineering.
Responsibilities
•
Design and simulate high speed, precision CMOS circuits for ATE applications
•
Perform layout, verification, and post layout simulation, including Monte Carlo, SOAC, and corner analysis
•
Perform mixed signal simulations at both the channel and chip levels
•
Develop and optimize circuit architectures for power, performance, and density
•
Support IC characterization, test development, and qualification
•
Collaborate with cross functional teams including digital design, layout, test, product, and applications engineering
Requirements
•
Bachelor’s degree in Electrical Engineering or related field
•
5+ years of professional experience in analog IC design
•
Strong foundation in analog CMOS circuit design
•
Experience designing and analyzing feedback loops, including stability analysis and compensation
•
Solid understanding of the full IC development lifecycle, from design and verification through qualification and manufacturing
•
Hands on experience with analog and mixed signal EDA tools such as Cadence, Mentor Graphics, or Tanner
•
Experience performing LVS and DRC verification using Cadence or Mentor tools
The anticipated annual base salary range for this position is $125,000.00 to $145,000.00. Actual compensation will be determined based on factors such as experience, skills, qualifications, education, location, and business needs.
Benefits
In addition to base salary, employees may be eligible for incentive compensation and a comprehensive benefits package. This salary range represents the Company’s good-faith estimate of the compensation it reasonably expects to pay for this position at the time of posting.
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