Digital Verification Intern
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Before you apply
LocationBarcelona, Spain
Work modeon-site
Typeinternship
SeniorityEntry
Company size1,001–5,000 people
PostedJul 20, 2026 · 3mo ago
Verified live6h ago
May no longer be actively hiring
Posted by the company on Jul 20, 202663% of this company's open roles have been listed for 90+ days
At a glanceSummarised by Seekless from the posting.
Bachelor/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework
Has the ability to follow instructions/tasks according to design specifications/procedures
Basic knowledge of ASIC development process and digital design techniques
Good written/verbal communication skills and strong team work/collaboration
Knowledge of standard DV languages (SystemVerilog, UVM) and behavioral/RTL coding
Executing tasks that hit project milestone
Knowledge/Experience with SCAN and Other DFT Techniques
Knowledge of power management industry/applications
Knowledge of I2C, I3C, SPI, USB, PMBUS
Scripting and automation languages like TCL, Python and C/C+
Skills
UVM
SystemVerilog
TCL
Python
C/C++
I2C
I3C
SPI
USB
PMBUS
About the company
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world —come join our team and see how YOU can make a difference.
Job Description:
A Digital Verification Engineer Intern to validation, integration, simulation, debugging and verification of digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management, signal management and mixed signal functions.
Task:
•
Assist with the creation of Digital Verification environments with UVM and SystemVerilog.
•
Write Digital and Mixed-Signal testcases and assertions/checkers.
•
Analyze and debug test results, code coverage and functional coverage.
•
Support on Verification IPs and standard tests, environments, checkers, etc.
•
Assist with Test Plan generation based on design requirements and product datasheets of digital / mixed-signal IC’s.
•
Close interaction with Senior Digital Design, Digital Verification and Analog Design Engineers to develop System Level and Behavioral Models.
•
Automation and scripting.
•
Gate-Level verification.
Qualifications:
•
Bachelor/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.
•
Has the ability to follow instructions/tasks according to design specifications/procedures.
•
Basic knowledge of ASIC development process and digital design techniques.
•
Good written/verbal communication skills and strong team work/collaboration.
•
Knowledge of standard DV languages (SystemVerilog, UVM) and behavioral/RTL coding.
•
Executing tasks that hit project milestone.
•
Knowledge/Experience with the following is a plus:
•
SCAN and Other DFT Techniques.
•
Knowledge of power management industry/applications.
•
I2C, I3C, SPI, USB, PMBUS.
•
Scripting and automation languages like TCL, Python and C/C+
Location
Barcelona, Spain
Legal
Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.