LY
Lyte AIWafer Level Test Engineer/Lead
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Before you apply
LocationTaiwan
Work modeon-site
Typefull-time
SeniorityLead
Experience5+ yrs
DepartmentOperations
EquityIncluded
Company size201–500 people
First seenOct 16, 2026 · 2w ago
Verified live8h ago
At a glanceSummarised by Seekless from the posting.
Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering, Physics, or a related field
5+ years of hands-on ATE test program development for mixed-signal CMOS ICs, including direct wafer-level (CP / wafer sort) experience
Hands-on experience with Advantest V93000 (SmarTest) and/or Teradyne (UltraFLEX, J750, or similar) platforms
Working knowledge of BIST/DFT test methods and OTP/eFuse trimming at wafer level
Experience validating test programs pre-silicon in collaboration with chip design teams
Proven experience maintaining production test programs and supporting OSATs or test houses, including program transfer and correlation
Programming in C/C++ and/or Java (SmarTest) or VB/VBT (IG-XL)
Solid data analysis skills: STDF, wafer maps, yield Paretos, Cp/Cpk, and GR&R
Disciplined documentation, version control (e.g., Git/SVN), and change-management practices
Strong written and spoken English to work with HQ engineers across time zones
Mandarin fluency to work with local partners
Ownership mindset and strong teamwork
Willing to travel regularly within Taiwan and occasionally across Asia
Python or Perl scripting is a plus
Master's degree in Electrical Engineering or a related field
Experience as a test lead, owning test strategy and coordinating multiple test house and OSAT partners
Familiarity with probe card design and qualification, load boards, and prober set-up and cleaning recipes
Prior experience at, or working closely with, a Taiwan test house or OSAT
Experience with test-time reduction, multi-site test development, and adaptive test / outlier screening (e.g., Part Average Testing)
Experience with yield-management and analysis tools (e.g., JMP, Spotfire, or similar)
Experience testing analog/mixed-signal blocks such as ADCs/DACs, PLLs, LDOs, bandgaps, and high-speed interfaces
Knowledge of automotive quality standards such as AEC-Q100
Experience with known-good-die (KGD) screening and advanced-packaging wafer-level test
Experience with, or strong interest in, optical and silicon photonics wafer-level test
Familiarity with lidar, FMCW, photonics, or robotics sensor technologies
Skills
Advantest V93000
Teradyne (UltraFLEX, J750, or similar)
BIST
DFT
OTP/eFuse
C/C++
Java
VB/VBT
Python
Perl
STDF
Git
SVN
Benefits
Competitive salary
Equity
Flexible vacation
Time off
Collaborative environment
Fast paced environment
Inclusive environment
About the role
•
We are seeking an experienced Wafer-Level Test (WLT) Engineer/Lead based in Taiwan (Hsinchu area preferred). You will own wafer-level (CP / wafer sort) test for Lyte’s custom mixed-signal CMOS silicon, the chips at the heart of our products. You will develop, validate, and maintain ATE wafer-level test programs with Lyte’s test house partners, and transfer released programs to OSAT partners for volume production.
What you’ll do
•
Own wafer-level (CP / wafer sort) test at Lyte’s Taiwan test house partners, managing test program development, engineering lots, and production wafer sort.
•
Develop ATE wafer-level test programs for mixed-signal CMOS on Advantest V93000 or Teradyne platforms. This covers test program architecture, test flows, pin/levels/timing set-ups, binning, and limits tables.
•
Work daily with Lyte’s chip design team at our US headquarters to translate design into test plans, test specifications, and test coverage matrices.
•
Implement and debug BIST, scan/DFT, analog and mixed-signal parametric tests, and OTP/eFuse trimming routines.
•
Validate test programs before first silicon using offline/virtual tester environments and pattern conversion (WGL/STIL/VCD) from design simulation.
•
Bring up new silicon on the tester, covering first-silicon debug, characterization, and correlation between bench, ATE, and simulation results.
•
Maintain released programs across their lifecycle, with full regression and sign-off. This covers change requests, limit updates, bug fixes, test-time reduction, and yield improvements.
•
Transfer released test programs to OSAT partners for volume production. This includes tester-to-tester and site-to-site correlation, GR&R, golden-wafer checks, and production release readiness.
•
Deploy and maintain test programs at partner sites, including production issue triage, excursion response, and root cause and corrective action (8D / 5-Why).
•
Work with partners on probe card specification and qualification, prober set-up, contact/overdrive optimization, and tester hardware debug.
•
Analyze wafer test data (STDF, wafer maps, bin Paretos, Cp/Cpk) to monitor yield, detect excursions, and drive yield and test-time improvements.
•
Extend Lyte’s capability into advanced wafer-level test as programs mature, including optical wafer-level test, working with partners on test methods, hardware, and correlation.
•
Own test documentation and version control so every build is traceable and reproducible across partner sites. Report regularly on test development, yield, and production readiness to engineering and operations leadership.
•
Travel to test house and OSAT facilities in Taiwan and across Asia as needed to resolve issues and support production ramps.
Required Qualifications
•
Bachelor’s degree in Electrical Engineering, Electronics, Computer Engineering, Physics, or a related field.
•
5+ years of hands-on ATE test program development for mixed-signal CMOS ICs, including direct wafer-level (CP / wafer sort) experience.
•
Hands-on experience with Advantest V93000 (SmarTest) and/or Teradyne (UltraFLEX, J750, or similar) platforms.
•
Working knowledge of BIST/DFT test methods and OTP/eFuse trimming at wafer level.
•
Experience validating test programs pre-silicon in collaboration with chip design teams.
•
Proven experience maintaining production test programs and supporting OSATs or test houses, including program transfer and correlation.
•
Programming in C/C++ and/or Java (SmarTest) or VB/VBT (IG-XL). Python or Perl scripting is a plus.
•
Solid data analysis skills: STDF, wafer maps, yield Paretos, Cp/Cpk, and GR&R.
•
Disciplined documentation, version control (e.g., Git/SVN), and change-management practices.
•
Strong written and spoken English to work with HQ engineers across time zones, plus Mandarin fluency to work with local partners.
•
Ownership mindset and strong teamwork. You are comfortable working independently at partner sites and willing to travel regularly within Taiwan and occasionally across Asia.
Preferred Qualifications
•
Master’s degree in Electrical Engineering or a related field.
•
Experience as a test lead, owning test strategy and coordinating multiple test house and OSAT partners.
•
Familiarity with probe card design and qualification, load boards, and prober set-up and cleaning recipes.
•
Prior experience at, or working closely with, a Taiwan test house or OSAT.
•
Experience with test-time reduction, multi-site test development, and adaptive test / outlier screening (e.g., Part Average Testing).
•
Experience with yield-management and analysis tools (e.g., JMP, Spotfire, or similar).
•
Experience testing analog/mixed-signal blocks such as ADCs/DACs, PLLs, LDOs, bandgaps, and high-speed interfaces.
•
Knowledge of automotive quality standards such as AEC-Q100.
•
Experience with known-good-die (KGD) screening and advanced-packaging wafer-level test.
•
Experience with, or strong interest in, optical and silicon photonics wafer-level test.
•
Familiarity with lidar, FMCW, photonics, or robotics sensor technologies.
Benefits
Benefits (subject to location and local regulations)
•
Competitive salary and equity
•
Flexible vacation and time-off policy
•
Collaborative, fast-paced, and inclusive work environment
•
Opportunity to work on cutting-edge technologies with a highly cross-functional team
About the company
About Lyte
Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai
If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you!