At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Duties:
•
Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
•
Act as Functional Verification Engineer for DDR Memory Controller and Phy IP development team.
•
Perform functional verification of Cadence’s DDR Memory Controller and Phy IP solution.
•
Work with the existing functional verification environment and add new features into the verification environment.
•
Ensure various customer configurations are clean as part of verification regressions, support customers in case of any issues with using the verification environment, and provide functional and code coverage.
•
Ensure that the design is in line with the technical and quality requirements set for the team – particularly with respect to functional and code coverage.
•
Some telecommuting permitted.
Qualifications:
•
Master’s degree in Computer Engineering, Electrical Engineering, or related field.
•
Minimum one (1) year of experience in the job offered or in a related occupation.
•
Digital verification skills, including writing detailed functional specifications that document Cadence’s Memory Controller IP verification process
•
Functional verification fundamentals, environment planning, test plan generation, or environment development
•
UVM based functional verification environment development
•
SVA/System Verilog assertion for protocol checker development
•
Utilize Advanced Microcontroller Bus Architecture (AMBA) protocols to connect and manage functional blocks in system-on-a-chip designs
We’re doing work that matters. Help us solve what others can’t.