Find jobs
Pricing
Sign in
FIND JOBSPRICINGSIGN INSIGN UP
← Back
MA
Marvell

DSP Firmware Engineer

LocationCordoba, Argentina
Work modeon-site
Typefull-time
DepartmentEngineering
Company size10,000+ people
First seen1w ago
Last seen3d ago
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell coherent DSP devices are critical enablers for efficient transmission over Fiber Optical networks.
At Marvell Coherent DSP solutions, we design leading-edge high-performance integrated circuits that are shipped into top major hyper-scale and telecom networks worldwide.
You will be part of a highly skilled team involved in the design, simulation, implementation, and validation of DSP ASICs.
What You Can Expect
Develop RTL for microcontroller subsystems, including integration of existing CPU/microprocessor cores.
Design and implement on‑chip buses, memory interfaces, interrupts, peripherals, and communication blocks.
Create block‑level specifications and documentation.
Collaborate with verification teams to define test plans, debug design issues, and ensure functional correctness.
Support synthesis, timing closure, and physical implementation teams by providing constraints, documentation, and timely resolution of design issues.
Participate in design reviews and contribute to architecture decisions.
Interact with firmware, architecture, and hardware teams to ensure cohesive system integration.
What We’re Looking For
BS or MS in Electronics, Computer Science or Telecommunications
Proficiency in RTL design using Verilog and/or SystemVerilog.
Solid understanding of digital logic design, synchronous design principles, and hardware state machines.
Knowledge of on‑chip bus protocols (e.g., AMBA AXI/AHB/APB or similar).
Experience integrating microprocessor cores, memory subsystems, or complex digital IP blocks.
Familiarity with ASIC design flows, including synthesis and static timing analysis.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
Legal
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
#LI-MFBJ
More roles at Marvell
SRAM Software Engineer Intern, BS - Summer 2027Director Gross Margin Program ManagementSenior Staff Embedded Device Software EngineerHardware Board Design Senior Staff EngineerPrincipal Analog/Mixed Signal CAD Engineer
Seekless
Product
Find jobsCompaniesPricing
Legal
PrivacyTermsCookies
© 2026 SEEKLESS, INC. ALL RIGHTS RESERVED.BUILT WITH CARE