At a glanceSummarised by Seekless from the posting.
Must have13
6+ years experience
RTL design using Verilog or System Verilog
Strong RTL coding practices
Design of complex state machines, data paths and arbitration
Exposure to emulation and emulation compatible RTL design
Ability to verify functionality with Unit level TB
Modelling and performance simulation
Strong Problem solving and RTL debugging skills
Writing detailed design specification and micro architecture documents
Experience in FPGA based prototypes development
Self-driven, adaptable, flexible, creative, capable of working independently
Solution-orientated, quality-driven and focused on timely deliverables
B.Tech/B.E/M.Tech/M.E
Nice to have2
Prior experience on memory design is a plus
Knowledge on area optimization techniques on Emulation platform would be an asset
Eligibility1
Equal Employment Opportunity
Skills
Verilog
System Verilog
RTL
FPGA
Position Summary
About Samsung Semiconductor India Research (SSIR)
With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities
Samsung Semiconductor India Research (SSIR) is looking for a bright RTL Design Engineer who will be responsible for performing concept and specification study of Samsung Memory (Flash, DRAM).
Providing high quality RTL design in terms of performance, emulation compatibility and area utilization. Writing detailed design specification and micro architecture documents. Memory team, SSIR Bangalore plays a key role in maintaining this leadership by continuous innovation and applying it to a real life products. We provide the opportunities for you to share and build up your knowledge and expertise, and collaborate to drive innovation forward. At Samsung, you will witness your ideas come to life in new products and solutions that shape the future.
Requirements
Experience: 6+ years
RTL design using Verilog or System Verilog. Strong RTL coding practices.
Design of complex state machines, data paths and arbitration.
Exposure to emulation and emulation compatible RTL design.
Ability to verify functionality with Unit level TB.
Modelling and performance simulation.
Nice to have
Prior experience on memory design is a plus.
Knowledge on area optimization techniques on Emulation platform would be an asset.
Strong Problem solving and RTL debugging skills
Writing detailed design specification and micro architecture documents.
Experience in FPGA based prototypes development
Individual should be self-driven, adaptable, flexible, creative, and capable of working independently.
The candidate needs to be solution-orientated, quality-driven and focused on timely deliverables
Skills and Qualifications
Qualifications
•
B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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