Staff Engineer
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Before you apply
LocationIND-Bangalore Electronic City - S1
Work modeon-site
Typefull-time
SeniorityLead
DepartmentEngineering
Company size10,000+ people
PostedSep 21, 2026 · 1mo ago
Verified live4d ago
At a glanceSummarised by Seekless from the posting.
Hands on Experience with RTL, Synthesis
Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs
Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the DFT signoff
Familiarity with Spyglass, LEC, CDC, and Synthesis tools DC Ultra, Fusion Compiler
Proficiency with Verilog NC, Verilog XL tools
Strong fundamentals in digital design and Coding/Verifying complex RTL subsystems
Familiarity with GLS, simulation, UVM, OVM methodologies is a big plus
Skills
RTL
Verification
DFT
Tessent
MBIST
ATPG
RSQ
OVM
UVM
Spyglass
LEC
CDC
DC Ultra
Fusion Compiler
GLS
Verilog NC
Verilog XL
Synthesis
ICC
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Job Description:
Broadcom Central Engineering team is looking for a Multi Skilled RTL, Verification engineer with DFT expertise. The Successful candidate will work in one or more domains of RTL, Verification, DFT for Complex Memory, IO subsystems, Hierarchical Blocks including BIST. It is a great opportunity and challenging role for the people who want to gain in-depth knowledge on end to end chip development flow with deeper expertise on RTL, Synth and Memory BIST
Responsibilities
•
RTL development and Verification for Digital subsystems, Memory Subsystems including BIST.
•
Memory Digital Subsystems with Tessent/Embedded MBIST
•
MBIST, ATPG, RSQ Verification and sign-off.
•
Formal verification, Cross Clock Domain checks, Power/Timing sign off
•
Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently.
Requirements
•
Hands on Experience with RTL, Synthesis,
•
Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs
•
Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the DFT signoff.
•
Familiarity with Spyglass, LEC, CDC, and Synthesis tools DC Ultra, Fusion Compiler.
•
Familiarity with GLS, simulation, UVM, OVM methodologies is a big plus
•
Proficiency with Verilog NC, Verilog XL tools
•
Strong fundamentals in digital design and Coding/Verifying complex RTL subsystems
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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