Staff Engineer,Post-Silicon Validation
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Before you apply
Salary$100k – $500k
LocationAustin, Santa Clara, Texas, United States; Santa Clara, California, United States
Work modehybrid
Typefull-time
SeniorityLead
Experience5+ yrs
DepartmentRISC V: PostSi
Company size501–1,000 people
PostedSep 28, 2026 · 1mo ago
Verified live17h ago
At a glanceSummarised by Seekless from the posting.
5+ years of experience in SoC bring-up, validation, and silicon debug
Strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems
Comfortable debugging complex hardware/software interaction issues using lab tools and low-level software
Thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams
Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validation plans
Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces
Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation
Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions
Applicant must be eligible to access U.S. export-controlled technology
Skills
RISC-V
SoC
Linux
About the company
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
About the role
We are looking for a Post-Silicon Validation Engineer to drive bring-up, validation, and debug of RISC-V–based SoCs. This role sits at the intersection of silicon, firmware, and system software, and requires hands-on lab experience and understanding of SoC architectures.
You will own post-silicon validation from first-silicon bring-up through production readiness, working closely with design, pre-silicon verification, firmware, and software teams.
This role ishybrid, based out of Austin TX, or Santa Clara CA.
Hiring process
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
•
You are a seasoned post-silicon engineer with 5+ years of experience in SoC bring-up, validation, and silicon debug.
•
You have a strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
•
You are comfortable debugging complex hardware/software interaction issues using lab tools and low-level software.
•
You thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams to solve hard problems.
What We Need
•
Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validation plans.
•
Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
•
Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation.
•
Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions.
What You Will Learn
Benefits
•
Deep hands-on exposure to cutting-edge RISC-V SoCs, AI accelerators, and high-performance compute platforms.
•
End-to-end ownership across the silicon lifecycle—from first silicon to stable production.
•
Advanced silicon debug techniques spanning hardware, firmware, and operating systems.
•
Opportunities to influence architecture, validation strategy, and future silicon direction in a highly visible role.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
Legal
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.