Key Responsibilities
Program Management & Multi-Customer Execution
• Own end-to-end SLT execution for multiple concurrent XPU programs through silicon bring-up, production ramp, and sustained 100% volume operations
• Drive weekly program status, risk tracking, and customer commitments; escalate blockers to Senior Management within 24 hours with recommended mitigation
• Translate customer test specifications, quality gates, and margining requirements into actionable SLT plans; own electrical test coverage sign-off and escape rate targets
• Manage portfolio prioritization when programs compete for resources (equipment, site capacity, engineer time); present trade-off options and risks to director for conflict resolution
• Conduct customer program reviews, status updates, and escalation communication; own SLT portion of customer commitments
Production Operations & Asia Site Leadership
• Travel to Asia production sites couple times a year to manage test floor execution, resolve operational blockers, and ensure quality/schedule adherence
• Forecast SLT capacity requirements, drive equipment utilization optimization, and manage shift planning across US R&D and Asia production sites
• Partner with Ops manager on sustained production operations
• Establish SLT quality gates, data integrity audits, and escalation protocols for Asia production sites
• Drive equipment maintenance scheduling, spare parts inventory management, and tooling readiness to maximize SLT test floor uptime and minimize operational downtime
Test Methodology & Equipment Innovation
• Evaluate and pilot new test techniques (advanced margining, Vmin stress, multi-site protocols) in partnership with Design/DFT teams
• Lead transition of new test methodologies from R&D (US) to production (Asia); drive pilot design, runoff, and full deployment
• Influence ATE equipment roadmap and automation tooling; assess new equipment investments and ROI for SLT operations
• Mentor engineers on advanced test methodologies and drive capability growth in distributed team
• Contribute to post-silicon debug and yield correlation analysis; own SLT test-related root cause investigations
Cross-Functional Collaboration & Risk Management
• Identify, track, and prioritize risks across schedule, yield, capacity, and equipment; assess risk working with owners and target closure
• Lead root-cause analysis on yield misses, test escapes, and schedule delays; own corrective action closure and prevention planning
• Partner with Design/DFT on testability and early-silicon yield correlation; surface test bottlenecks before they cascade
• Coordinate with Manufacturing and Logistics on device staging, test scheduling, and shipment readiness
• Work with Quality/Reliability on escape analysis and early-life failure investigation
• Drive SLT yield improvement initiatives and Defective Parts Per Million (DPPM) reduction targets by partnering with test, design, and manufacturing teams to drive continuous quality enhancements