Founding Silicon Engineer
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Before you apply
Salary$140k – $200k
LocationSan Francisco, CA
Typefull-time
SenioritySenior
Experience2+ yrs
DepartmentEngineering
EquityIncluded
Company size1–10 people
First seenOct 18, 2026 · 2w ago
Verified live2d ago
At a glanceSummarised by Seekless from the posting.
2+ years of experience in ASIC/SoC design and verification
Hands-on familiarity with industry-standard EDA tooling — Synopsys, Cadence, Questa, or equivalent
Strong expertise in digital verification, SystemVerilog, and UVM
Proficiency in scripting languages and programming (Python, Tcl, Perl, or equivalent)
Excellent debugging skills across simulation, waveform analysis, and coverage closure
Strong communication and collaboration abilities
Experience deploying or integrating EDA tools into automated flows or CI pipelines
Exposure to formal verification methods
Interest in AI and machine learning applications in chip design
Experience working at a startup or in a high-ownership engineering environment
Skills
SystemVerilog
UVM
Python
Tcl
Perl
Synopsys
Cadence
Questa
EDA
ASIC
SoC
digital verification
formal verification
Benefits
Health insurance
Vision
Dental
401(k)
Housing stipend
About the Role
As a Founding Silicon Engineer, you will be the domain backbone of Bronco’s AI agents. You’ll contribute to the architecture of our reasoning systems, drive tool integrations with industry-standard EDA environments, and shape product direction based on what you know from the inside — the workflows, pain points, and failure modes that only come from real verification experience.
This role puts you at the intersection of AI and silicon at a unique moment. You’ll have a front row seat into a diverse range of chip projects across the industry — from AI accelerators to SoCs to custom silicon — and you’ll be fundamentally changing how chips are made. The ideal candidate is an experienced silicon or verification engineer who has spent real time inside industry CAD flows. We have a strong preference for founding engineers, early-stage engineers, and past founders.
What You’ll Do
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Contribute to the architecture of Bronco’s domain-specific reasoning systems — defining task structure, expected agent behavior, and quality criteria across DV workflows
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Own and expand tool integrations between Bronco’s AI and EDA environments — simulators, coverage tools, linters, and formal verification platforms
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Work hands-on with CAD and EDA tooling to build, test, and validate AI-generated outputs against real verification environments
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Deploy and integrate Bronco into customer workflows, working directly alongside verification teams at leading chip companies
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Feed onsite learnings back into product direction and tool integration roadmap
We’d Like to See
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You are an exceptional engineer who can solve any problem
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2+ years of experience in ASIC/SoC design and verification
•
Hands-on familiarity with industry-standard EDA tooling — Synopsys, Cadence, Questa, or equivalent
•
Strong expertise in digital verification, SystemVerilog, and UVM
•
Proficiency in scripting languages and programming (Python, Tcl, Perl, or equivalent)
•
Excellent debugging skills across simulation, waveform analysis, and coverage closure
•
Strong communication and collaboration abilities
We’d Prefer If You Had
•
Experience deploying or integrating EDA tools into automated flows or CI pipelines
•
Exposure to formal verification methods
•
Interest in AI and machine learning applications in chip design
•
Experience working at a startup or in a high-ownership engineering environment
What We Offer
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Competitive salary and equity package
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Comprehensive benefits including health, vision, dental, and 401(k)
•
Housing stipend
•
High-ownership, high-velocity environment with rapid learning opportunities
•
A technical problem that is the present rate limiter on the future
About the company
About Us
The future will have more chips, in more varieties, for more applications than ever before. The current way of designing, testing, and manufacturing them can’t keep up. Outdated chip development processes are the present rate limiter on humanity’s future. Bronco’s mission is to keep Moore’s law going by building AI agents that automate large swaths of repetitive chip verification and design.
We’re deployed alongside verification teams at some of the largest chip companies in the world, supporting production SoC designs at leading-edge process nodes.
We are backed by tier-1 Silicon Valley investors with deep relationships across the semiconductor industry.
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