Senior FPGA Engineer
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Before you apply
Salary$130k – $185k
LocationEnglewood, CO, us
Typefull-time
SenioritySenior
Experience10+ yrs
DepartmentEngineering
Company size201–500 people
PostedJun 8, 2026 · 5mo ago
Verified live1d ago
At a glanceSummarised by Seekless from the posting.
Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of moderate complexity
Demonstrate knowledge and development of a test bench with self-checking and simulation (including back annotated timing) for given FPGA modules, top level FPGA, and system with multiple FPGAs
Knowledge of FPGA technology differences (Xilinx vs Actel/Microsemi)
Experience with FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado and Libero
Experience with scripting languages such as TCL or Python
Experience leading small sized teams in order to develop moderately complex systems according to program schedule expectations
FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design
Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers
Leadership skills and ability to provide support and technical direction to junior engineers
Clear written and verbal communication skills
At least 10+ years of FPGA experience
Knowledge of RTL design techniques for radiation upset mitigation
Experience using multiple RTL languages
US Citizenship Required
Skills
Verilog
VHDL
Xilinx
Actel/Microsemi
Synplify Pro
ISE
Vivado
Libero
TCL
Python
FPGA
ASIC
RTL
CDC
lab tools
logic analyzers
Benefits
Medical insurance
Dental insurance
Vision insurance
401(k)
Year end bonus
Paid leave
Company Description
Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space.
Job Description
Seeking an FPGA Engineer who has extensive knowledge of digital circuit design, state machines, Boolean math and FPGAs.
Requirements
Candidate shall have experience with
•
Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of moderate complexity
•
Demonstrate knowledge and development of a test bench with self-checking and simulation (including back annotated timing) for given FPGA modules, top level FPGA, and system with multiple FPGAs
•
FPGA technology differences (Xilinx vs Actel/Microsemi)
•
FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado and Libero
•
Scripting languages such as TCL or Python
•
Leading small sized teams in order to develop moderately complex systems according to program schedule expectations
Required skills
•
FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design
•
Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers
Nice to have
Knowledge of RTL design techniques for radiation upset mitigation and experience using multiple RTL languages are a plus.
Qualifications
•
Candidate shall also have leadership skills and ability to provide support and technical direction to junior engineers.
•
Clear written and verbal communication skills are required.
•
A Bachelor’s degree in Electrical Engineering or Computer Science is desired.
•
Must have at least 10+ years of FPGA experience.
Additional Information
Compensation: Base pay range is $130,000-185,000 depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA.
Legal
SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines.
US Citizenship Required
Applications will be accepted until 6/19/26