Senior Director, Physical Design
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Before you apply
LocationRegus, Madhapur
Work modeon-site
Typefull-time
SeniorityDirector
Experience15+ yrs
Company size1,001–5,000 people
PostedOct 26, 2026 · 1w ago
Verified live2d ago
At a glanceSummarised by Seekless from the posting.
15+ years of experience in physical design of complex semiconductor products
10+ years in management and team leadership roles
Deep expertise in placement, routing, physical verification, and signoff at 7nm and below nodes
Strong knowledge of design automation tools and methodologies
Proven track record of delivering high-quality silicon within schedule and power budgets
Experience managing large, distributed engineering teams
Bachelor's degree in Electronic Engineering or related field
Advanced degree (Master's or PhD) in Electronics Engineering
Experience in advanced node physical design at 5nm or below
Background in FPGA or programmable logic design
Experience with multiple foundry relationships (TSMC, Samsung, Intel)
Leadership experience in geographically distributed teams across multiple time zones
Skills
placement
routing
physical verification
signoff
design automation tools
Job Details:
Job Description:
Altera seeks an experienced Senior Director of Physical Design to lead the physical design strategy and execution of next-generation semiconductor products. This leader will drive innovation in design methodologies, oversee complex chip implementations, and mentor a high-performing team of physical design engineers across multiple product lines.
Key Responsibilities
•
Lead physical design strategy and execution for advanced-node semiconductor products
•
Manage and mentor a team of physical design managers, principal engineers, and senior engineers
•
Establish and drive physical design methodologies, standards, and best practices
•
Collaborate with cross-functional teams including logic design, DFT, and power management
•
Drive continuous improvement in design quality, power, performance, and area (PPA)
•
Manage physical design budgets, schedules, and resource allocation
•
Evaluate and implement emerging design automation tools and technologies
Partner with vendor ecosystem to optimize tool flows and capabilities
Qualifications:
•
15+ years of experience in physical design of complex semiconductor products
•
10+ years in management and team leadership roles
•
Deep expertise in placement, routing, physical verification, and signoff at 7nm and below nodes
•
Strong knowledge of design automation tools and methodologies
•
Proven track record of delivering high-quality silicon within schedule and power budgets
•
Experience managing large, distributed engineering teams
•
Bachelor’s degree in Electronic Engineering or related field
Preferred Qualifications
•
Advanced degree (Master’s or PhD) in Electronics Engineering
•
Experience in advanced node physical design at 5nm or below
•
Background in FPGA or programmable logic design
•
Experience with multiple foundry relationships (TSMC, Samsung, Intel)
•
Leadership experience in geographically distributed teams across multiple time zones
Job Type:
Regular
Shift:
Shift 1 (India)
Primary Location:
Regus, Madhapur
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.