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About the role
The Lead Analog Design Engineer will take a Key role on the Analog and Mixed signal design team as part of a Die to Die Product Development Team.
Responsibilities
Job Responsibilities:
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Design of High Speed D2D and SERDES products at industry standard data rates up on leading edge technology nodes (e.g. 3nm FinFET CMOS)
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Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
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Work closely with Layout Design Engineers to design IC circuit blocks and PMA sections
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Work with Technical Team Leads in the areas of circuit design and SERDES architectures
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Work with global teams (US, west coast and east coast), which work in different time-zones
Requirements
Job Qualifications:
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BEng, MEng, PhD or equivalent.
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Candidate’s background should include a minimum of 8 years of CMOS design experience, preferably in the area of CMOS SERDES or high-speed I/O IC design
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Should have a good understanding of jitter and signal equalization techniques
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Design experience in some of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
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Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment
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Position requires proficiency in using CAD tools for circuit simulation, layout and physical verification
Nice to have
Additional Skills/Preferences:
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Cadence tool experience is desirable and design experience at >10Gbps and in <16nm technologies
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Lab test experience as part of silicon evaluation is advantageous
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