Find jobs
Pricing
Sign in
FIND JOBSPRICINGSIGN INSIGN UP
← Back
CA
Cadence

Lead Design Engineer

LocationPUNE
Company size10,000+ people
First seen2w ago
Last seen4d ago
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Requirements
3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills.
We’re doing work that matters. Help us solve what others can’t.
More roles at Cadence
Program Manager IISecurity ReceptionistIntern Digital ImplementationProcessor Core Logic Design/ArchitectAI Engineer, Ontologies & Knowledge Graphs
Seekless
Product
Find jobsCompaniesPricing
Legal
PrivacyTermsCookies
© 2026 SEEKLESS, INC. ALL RIGHTS RESERVED.BUILT WITH CARE