Optical - Vice President, Optical Product Development (OPD)
Location
Bay Area
Work mode
on-site
Type
full-time
Department
Engineering
Last seen
58m ago
Eliyan is building NuLink, a proprietary die-to-die chiplet interconnect fabric purpose-built for AI infrastructure at hyperscale. As Eliyan expands into co-packaged optics (CPO), the VP of Optical Product Development owns the product strategy for integrating third-party optical components — VCSELs, photodetectors, lenses, and fiber interfaces — with Eliyan’s silicon die at the package level. This role requires deep familiarity with semiconductor fabrication and assembly processes, as all optical integration decisions are constrained by and executed within a semiconductor packaging environment.
KEY RESPONSIBILITIES
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Define optical product strategy centered on die-level co-packaging of external optical components with Eliyan’s silicon.
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Own the optical component selection and qualification process (VCSELs, PDs, lenses, fiber connectors), evaluating vendors against system performance and assembly compatibility requirements.
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Drive assembly-aware optical product specifications — accounting for flip-chip tolerances, solder reflow constraints, alignment accuracy, and packaging design rules.
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Engage silicon process and design teams on equal footing, translating optical requirements into process-compatible constraints and vice versa.
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Navigate optical-electrical co-design tradeoffs within foundry process boundaries (e.g., TSMC, GlobalFoundries, or equivalent).
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Serve as the primary interface between optical and silicon teams (analog/digital), ensuring bidirectional feed-in/feedback between optical integration requirements and silicon design.
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Partner with Marketing to define product positioning, customer-facing optical specifications, and roadmap priorities.
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Report execution status and product milestones to the COA
QUALIFICATIONS
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12+ years in optical systems or photonic integration, with substantial hands-on experience in semiconductor fabrication, assembly, or advanced packaging environments.
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Solid working knowledge of semiconductor fabrication processes — FEOL/BEOL concepts, lithography constraints, metal layer stackups, and how process design rules affect optical integration feasibility.
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Deep understanding of co-packaging architectures — flip-chip bonding, micro-bump interconnects, interposer-based integration, or equivalent.
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Experience qualifying and integrating third-party optical components (VCSELs, PDs, optical subassemblies) into semiconductor packages.
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Familiarity with packaging design rules and their implications for optical alignment yield.
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Experience navigating optical-electrical co-design tradeoffs within foundry process boundaries.
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Strong cross-functional communication skills across silicon, packaging, and marketing teams.
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Standards-body experience (IEEE 802.3, OIF, CPO Consortium) a plus.