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Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms

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Before you apply
SalaryNo pay range posted
LocationBay Area
Work modeon-site
Typefull-time
SeniorityLead
Experience15+ yrs
DepartmentEngineering
EquityIncluded
Company size51–200 people
PostedAug 7, 2026 · 3mo ago
Verified live8h ago
California law requires most employers to post a pay range.
May no longer be actively hiring
Posted by the company on Aug 7, 202695% of this company's open roles have been listed for 90+ daysNo pay range listed, though California requires one
How we check a job is still live
At a glanceSummarised by Seekless from the posting.
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience
15+ years of semiconductor program management experience
Pre-silicon and post-silicon execution across at least two full IP or ASIC programs, from concept through production
Proven ability to lead large-scale, complex, multi-disciplinary semiconductor programs from architecture through volume production
Demonstrated ability to juggle multiple concurrent programs at once, making portfolio-level trade-offs
Deep working knowledge of the full silicon development lifecycle — front-end and back-end design, DV, DFT, packaging, PCB/platform design, and silicon bring-up
Experience managing external IP vendors and direct customer engagements around technical deliverables and integration
Strong track record driving schedule, risk, and budget management across many concurrent, interdependent workstreams
Excellent verbal and written communication skills
Ability to influence and drive alignment across engineering teams without direct authority, in a fast-moving startup environment
Experience with program management tools (e.g., Jira, MS Project, Smartsheet, Confluence) and methodologies (Agile, Waterfall, or hybrid)
Direct experience with chiplet interconnect, UCIe, or die-to-die PHY programs
Direct experience with advanced packaging (2.5D/3D, CoWoS, InFO, or similar)
Background in networking ASICs, mixed-signal PHY SoCs, high-performance computing, or AI/ML accelerator silicon
Working knowledge of firmware and software bring-up as it relates to silicon validation
PMP, PgMP, or equivalent program management certification
Skills
Jira
MS Project
Smartsheet
Confluence
Benefits
Health insurance
Equity
About the company
Eliyan is building the interconnect technology that makes chiplet-based systems possible. Our NuLink™ die-to-die PHY IP and NuGear™ chiplet solutions — offered both as licensable IP and as fully integrated chiplet products — deliver up to 4x the bandwidth and half the power of alternative approaches, letting the industry’s leading AI, HPC, and networking silicon teams mix best-in-class dies into a single high-performance package using both open standards (UCIe) and our own proprietary interconnect. As an Eliyan Principal / Sr. Principal Technical Program Manager, you’ll own the end-to-end execution of our IP, ASIC, and platform programs — from architecture and IP definition through design, verification, silicon bring-up, and production readiness. You’ll work shoulder-to-shoulder with a deep bench of design, packaging, and software experts who operate from first principles and push the envelope to create high-volume, high-performance, manufacturable products. This is a high-visibility, high-ownership role at a fast-moving, early-stage company defining a new category of semiconductor technology.
ON-SITE (BAY AREA)
Key Responsibilities:
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Program Leadership: Own end-to-end execution of IP, ASIC, and platform programs, from architecture and IP definition through design, verification, validation, silicon bring-up, and production readiness.
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Plan of Record & Critical Path Management: Build and maintain an integrated program schedule spanning design, verification, DFT, physical design, packaging, and software; own the critical path and drive it to closure.
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Cross-Functional Coordination: Partner daily with digital design, design verification, DFT, physical design, analog/mixed-signal design, packaging and substrate design, PCB and platform design, silicon bring-up, firmware, and software teams to keep every workstream aligned.
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Technical Fluency: Get into the technical details of interconnect and chiplet architecture, packaging tradeoffs, and SoC-level integration — enough to ask sharp questions, unblock engineering decisions, and speak credibly with customers and partners.
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Vendor and IP Management: Manage external IP vendors and OSAT/packaging partners, holding them accountable to committed timelines, specifications, and quality.
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Customer Engagement: Serve as the primary program interface to customers, defining deliverables and ensuring seamless integration of Eliyan’s IP and silicon solutions into their products.
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Schedule and Risk Management: Define milestones, maintain a live risk register, and proactively identify and mitigate the risks most likely to move the critical path.
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Budget and Resource Allocation: Manage program budgets, allocate resources efficiently, and track spend against plan to optimize development efforts.
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Technical Reviews and Decision-Making: Run regular program and technical reviews, surface tradeoffs, and drive decisions that optimize performance, cost, and schedule.
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Executive Reporting and Metrics: Quantify program health with clear KPIs, and translate technical detail into concise, decision-ready updates for engineering leadership and executives.
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Process, Documentation, and Reporting: Define and continuously improve program management practices and tooling as Eliyan scales, maintain clear documentation, and keep stakeholders informed with regular updates.
Required Qualifications:
•
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
•
15+ years of semiconductor program management experience, including pre-silicon and post-silicon execution across at least two full IP or ASIC programs, from concept through production.
•
Proven ability to lead large-scale, complex, multi-disciplinary semiconductor programs from architecture through volume production.
•
Demonstrated ability to juggle multiple concurrent programs at once, making portfolio-level trade-offs — prioritizing resources, schedules, and scope across programs to maximize overall business impact.
•
Deep working knowledge of the full silicon development lifecycle — front-end and back-end design, DV, DFT, packaging, PCB/platform design, and silicon bring-up.
•
Experience managing external IP vendors and direct customer engagements around technical deliverables and integration.
•
Strong track record driving schedule, risk, and budget management across many concurrent, interdependent workstreams.
•
Excellent verbal and written communication skills, with the ability to tailor style, tone, and level of detail to any audience — from a deep technical exchange with individual engineers to a concise, decision-ready narrative for the CEO.
•
Ability to influence and drive alignment across engineering teams without direct authority, in a fast-moving startup environment.
•
Experience with program management tools (e.g., Jira, MS Project, Smartsheet, Confluence) and methodologies (Agile, Waterfall, or hybrid).
Preferred Qualifications:
•
Direct experience with chiplet interconnect, UCIe, or die-to-die PHY programs, or with advanced packaging (2.5D/3D, CoWoS, InFO, or similar).
•
Background in networking ASICs, mixed-signal PHY SoCs, high-performance computing, or AI/ML accelerator silicon.
•
Working knowledge of firmware and software bring-up as it relates to silicon validation.
•
PMP, PgMP, or equivalent program management certification.
What We Offer:
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The chance to shape the program management function at a company defining a new segment of the semiconductor industry.
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Direct, high-visibility partnership with Eliyan’s founding and technical leadership team.
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Competitive salary, meaningful equity, and comprehensive health benefits.
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A collaborative, first-principles engineering culture built around solving hard problems together.