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Eliyan
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22 Open Roles
Engineering — 22 roles
Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal
Bay Area
on-site
full-time
22h ago
Senior
5+ yrs
ANSYS RedHawk-SC
RHSC Electrothermal
Totem
PathFinder
Package & SI/PI - Signal and Power Integrity Engineer
Bay Area
on-site
full-time
22h ago
Senior
5–7 yrs
HFSS
Q3D
Siwave
PowerDC
PD - Principal, Physical Design
Bay Area
on-site
full-time
22h ago
Senior
8–12 yrs
RTL
GDSII
ASIC
Synthesis
PD - Sr Staff — CAD & Design Methodology | RTL-to-GDSII Flow | Advanced Node Methodology |
Bay Area
on-site
full-time
22h ago
Senior
15+ yrs
RTL-to-GDSII
Synopsys
Cadence
Siemens
CAD - Staff AMS CAD Engineer
Bay Area
on-site
full-time
22h ago
Senior
5+ yrs
Python
Cadence SKILL
Cadence PCELLS
Bash
DV - Principal Digital Verification Engineer
Vancouver, BC OR Bay Area, CA
on-site
full-time
22h ago
Senior
15+ yrs
SystemVerilog
UVM
DPI
RTL
Optical - Vice President, Optical Product Development (OPD)
Bay Area
on-site
full-time
22h ago
VP
12+ yrs
VCSELs
photodetectors
lenses
fiber interfaces
Digital - Staff Digital Design Engineer - PHY
Bay Area, Vancouver or Toronto
on-site
full-time
22h ago
Senior
8+ yrs
SystemVerilog
Synopsys DC
Fusion Compiler
Cadence Genus
Digital - Principal Systems/DSP Engineer
Bay Area
on-site
full-time
22h ago
Senior
10+ yrs
MATLAB
Simulink
C
Python
Seekless
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