Advanced Micro Devices

Websiteamd.com

Company size10,000+ people

1250 Open RolesLast checked 13h ago

Engineering — 968 roles

RF Application Design Engineer

IE,Dublin, Irelandfull-timeVerified 13h ago

EntryPythonC/C++MathworksNI SW

Switch Quality Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SeniorMicrosoft Power BITableauJIRABroadcom

Systems Design Engineer

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

C/C++PerlRubyPython

Silicon Photonics Design Engineer

US,NY,Home Office, United Stateson-sitefull-timeVerified 13h ago

SeniorPythonCadenceFDTDMODE

Security Firmware Architect

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

LeadCC++AMD SEV-SNPIntel TDX

Fellow Software System Design Eng. (Linux Kernel & x86 Systems Architect)

DE,Munich,Home Office, Germanyhybridfull-timeVerified 13h ago

LeadLinuxx86C programmingKVM

GPU Kernel Performance Engineer

CN,Shanghai-B49, Chinafull-timeVerified 13h ago

SeniorC++PythonLinuxTensorFlow

IP Silicon Validation Engineer

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

RubyPythonPCIeCXL

Formal Verification Lead

IN,Bangalore-Technostar B3, Indiafull-timeVerified 13h ago

Lead13+ yrsSystemVerilog Assertions (SVA)Cadence JasperGoldSynopsys VC FormalSiemens Questa Formal

Digital Design Engineer - Core Debug

RO,Iasi, Romaniaon-sitefull-timeVerified 13h ago

EntryVerilogSystemVerilogVHDLC

Senior PD Engineer - STA & Timing Closure

IN,Hyderabad-Design Center, Indiafull-timeVerified 13h ago

Senior8–10 yrsPrimetimeICC2tclPerl

ASIC RTL Design Verification Manager

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior17+ yrsCC++ASMSystemVerilog

Principal Software Architect – AI-Enabled Silicon Development

US,MA,Boxborough, United Statesfull-timeVerified 13h ago

Leadgenerative AIlarge language modelsintelligent agentsretrieval-augmented systems

Supply Chain Program Manager, Rack Supply

US,TX,Austin, United Statesfull-timeVerified 13h ago

MidKinaxisPower BIExcelERP/MRP

Software Development Engineer- Storage solutions on DPUs

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

MidC/C++LinuxNVMeNVMe-oF

Sr DFT ATPG Lead

IN,Bangalore-Technostar B3, Indiafull-timeVerified 13h ago

LeadMentor testkompressSynopsys Tetramax/DFTMAXVCSPerl

Software Development Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

MidAI/MLautomation

Software Development Manager

US,CA,San Jose, United Statesfull-timeVerified 13h ago

LeadAIautomation

Hardware Design Engineer

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

LeadCadence AllegroGerberODB

Director Test Hardware Engineering & Manufacturing Enablement

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

DirectorATEload boardsprobe solutionssockets

Microprocessor VLSI Physical Design Engineer

US,CO,Ft Collins, United Stateson-sitefull-timeVerified 13h ago

SeniorVerilogPerlCTcl

Technical Program Manager- AI Rack Scale Validation and Debug

US,TX,Austin_Research Park, United Stateson-sitefull-timeVerified 13h ago

SeniorGPUCPUfirmwareBIOS/BMC

Software Development Engineer - GPU Interconnects and Ethernet AI

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

SeniorCC++PythonGo

Product Development Engineer (Program Management)

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

MidMS Office

Senior Infrastructure Engineer

CA,ON,Markham-1CV, Canadaon-sitefull-timeVerified 13h ago

SeniorLinuxWindowsKubernetesOpenShift

DFT Architect Lead

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior10+ yrsSCANATPGMBISTBSCAN

Engineering Technician

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid3+ yrsGPUPCBBGAWord

Systems Design Engineer

CA,BC,Vancouver, Canadafull-timeVerified 13h ago

C/C++PerlRubyPython

Staff Package Design Engineer

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

Lead5–10 yrsCadence APDCadence SiPAllegroAnsys HFSS

Engineering Technician

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

EntryUp to 3 yrsGPUPCBBGAWord

Design Verification Engineer

CA,ON,Markham-33CV, Canadaon-sitefull-timeVerified 13h ago

SeniorSystemVerilogUVMVCSVerdi

Staff Package Design Engineer

MY,Penang, Malaysiafull-timeVerified 13h ago

Lead5–10 yrsCadence APD/SIPAllegroAnsys HFSSAnsys SIwave

Engineering Technician

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

EntryUp to 3 yrsWordExcelEmail

Packaging Engineer, Substrate

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid

Silicon Design Engineer (1 year contract)

CA,ON,Markham-1CV, CanadatemporaryVerified 13h ago

EntryPerlPythonTCLC++

Program Manager - CPU Team

IN,Bangalore-Technostar B3, Indiafull-timeVerified 13h ago

Senior10–15 yrsJiraConfluenceMicrosoft Office Suite

AI Engineer (Software Development Engineer)

SG,Singaporefull-timeVerified 13h ago

EntryPythonOpenAIAzure OpenAIAnthropic

Lead Systems Engineer, Enterprise AI Server Platform Validation

US,TX,Austin-MET, United Stateson-sitefull-timeVerified 13h ago

LeadLinuxWindowsVMwareKVM

Sys/Test Validation Eng.

CN,Shanghai-Design Ctr B1, Chinaon-sitefull-timeVerified 13h ago

USBx86 architectureWindows ETLlogic analyzers

Sr. Solutions Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SeniorCC++PythonGo

RTL Design Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Mid4–5 yrsAXIUFSSDIOOctal SPI

Program Manager Product Infrastructure Engineering

US,TX,Austin, United Statesfull-timeVerified 13h ago

Lead

Senior Applications Engineer – AI & HPC, University Programs

IE,Dublin, Irelandfull-timeVerified 13h ago

SeniorAMD GPU softwareAIGPU ComputingHigh-Performance Computing (HPC)

Sr. Data Center Technician

IT,Milan, Italyon-sitefull-timeVerified 13h ago

SeniorLinuxWindowsWindows Deployment Services (WDS)Preboot Execution Environment (PXE)

Interconnect Micro-Architect and Design Development Lead

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadRTLCPUGPUNoC

SENIOR STAFF SILICON DESIGN ENGINEER

IE,Cork, Irelandfull-timeVerified 13h ago

LeadSerDesADCDACVerilog

Senior Graphics Machine Learning Engineer

DE,Munich, Germanyfull-timeVerified 13h ago

SeniorPythonC++GitCMake

Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization

SA, Riyadh, Saudi Arabiafull-timeVerified 13h ago

Senior8+ yrsPythonC++TritonHIP

AI Solution Architect

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

SeniorPythonC/C++JupyterAWS

Silicon Design Engineer

CN,Shanghai-B49, Chinafull-timeVerified 13h ago

SeniorTclPythonPerlCadence Innovus

Sys/Test Validation Engineer

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid3+ yrsGPUAIPCBAX-ray

System/Test Validation Engineer

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid3+ yrs

Sr. Staff Physical Design Engineer

CA,BC,Vancouver, Canadafull-timeVerified 13h ago

LeadSynopsys ICC2ICCFusion CompilerPrimeTime

Lead Silicon Design Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

LeadCMOSSPICEGPIOI/O

Senior Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization

SA, Riyadh, Saudi Arabiafull-timeVerified 13h ago

Senior8+ yrsPythonC++TritonHIP

Sr Manager - DFT

IN,Bangalore-Technostar B3, Indiafull-timeVerified 13h ago

Senior15+ yrsVerilogSystemVerilogPerlPython

CPU Cache Architect

US,CO,Ft Collins, United Stateson-sitefull-timeVerified 13h ago

SeniorC++Verilog HDLRTL

Lead AI/ML - NPU Validation Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Senior3+ yrsCC++PythonShell

ASIC Design Engineer, PCIe IP Enablement

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

SeniorRTLVerilog HDLsynthesisCDC tools

ML Compiler Engineer

US,CA,San Jose, United Statesfull-timeVerified 13h ago

C++MLIRGitHub

CPU Cache Architect

US,CO,Ft Collins, United Stateson-sitefull-timeVerified 13h ago

LeadC++Verilog HDLDigital RTL Design

Sr. Manager Systems Design Engineer

TW,Taipei_Nangang, Taiwanfull-timeVerified 13h ago

Senior15+ yrsACPI specificationWindows OSfirmwaresoftware

PLL Design/ Integration Sr Staff Engineer

US,CA,San Jose, United Statesfull-timeVerified 13h ago

LeadVivadoSystemVerilogPLLsLDOs

System Design Engineer

US,TX,Austin-MET, United Statesfull-timeVerified 13h ago

LeadPythonPerlRubyShell script

AI Solution Engineer - Agentic AI

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior5–8 yrsPythonOpenAIAzure OpenAIClaude

Senior Analog layout Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead8+ yrsCadence VirtuosoMentor CalibreLVSDRC

Core RTL/Microarchitecture Power Lead

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

LeadVerilogSystemVerilogRTLPTPX

Senior Technical Marketing Engineer / Principal Technical Marketing Engineer

GB,Belfast, United Kingdomfull-timeVerified 13h ago

LeadPythonC++LinuxZephyr RTOS

CPU Core RTL Design Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

VerilogSystemVerilogPythonTcl

Engineering Technician

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

EntryUp to 3 yrsWordExcelEmailGPU

AI framework Eng.

CN,Shanghai-B49, Chinafull-timeVerified 13h ago

SeniorC++PythonTensorFlowPyTorch

RTL Design Engineer

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

VerilogSystemVerilogPythonTcl

System/Test Validation Engineer

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid3+ yrsDFMDFTPCBAICT/FCT testing

CPU Verification Engineer - Core Enablement

IN,Bangalore-Technostar B3, Indiafull-timeVerified 13h ago

MidVerilogSystem VerilogUVMC

AI Framework Engineer

CN,Shanghai-B49, Chinafull-timeVerified 13h ago

C++LinuxPythonHIP

Physical Design Lead

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead7+ yrsPerlRubyMakefileshell

Sr. Program Manager - CPU Cores

GB,Cambridge, United Kingdomfull-timeVerified 13h ago

SeniorConfluenceJIRAMicrosoft OfficeExcel

System/Test Validation Engineer

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

Mid3+ yrs

Director, Cluster Forward Deployment Engineering Data Center GPU

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

DirectorGPUROCmLinuxKubernetes

Lead Power Methodology Analysis Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

LeadRTLAI/ML

Product Development Engineering - Yield Engineer (MTS)

US,TX,Austin, United Statesfull-timeVerified 13h ago

MidJMPbig data modelsdatabasesmachine learning

Principal, Server CPU Validation Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

LeadC/C++PythonLinuxPCIe

Silicon Diagnosis DFT Engineer

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

C/C++VerilogPerlPython

Staff Silicon Design Engineer – Physical Design

SG,Singaporefull-timeVerified 13h ago

LeadTclPythonPerlFusion Compiler

Server Platform Validation Engineer

US,TX,Austin-MET, United Stateson-sitefull-timeVerified 13h ago

MidPythonC/C++PerlLinux

Validation Engineer – AI & Server Platforms

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

Senior3+ yrsPCIeCXLRASAI

CPU Verification Engineer

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Mid2–5 yrsCC++SystemVerilogx86

Lead PD/ Physical design Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead7+ yrsInnovusFusion compilerPrimeTimePerl

Technical Program Manager, Microsoft Windows

US,WA,Bellevue, United Statesfull-timeVerified 13h ago

Lead SoC Architect

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

LeadPCIeCXLUCIeUAL

Firmware Engineer

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

SeniorCUEFIRAS

Post-Silicon Power and Performance Staff Engineer

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

LeadExcelPythonPowerBISigma

Silicon Firmware Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorCC++

Silicon Design Engineer

TW,Hsinchu, Taiwanfull-timeVerified 13h ago

VerilogC/C++TclRuby

RTL Design Engineer

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

VerilogSystemVerilogPythonTcl

Sr. Manager, AI Storage Solutions

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

SeniorstorageGPUsmemoryCPUs

Developer Relations Manager

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorAIMLPowerpoint

SOFTWARE SYSTEMS DESIGNER

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior5+ yrsCC++WindowsLinux

RTL Design Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

CC++SystemVerilogUVM

Virtualization Engineer

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

SeniorVMware VCFvSphere/ESXNSXVMware ESXi

Software Development Program Manager

US,NJ,Secaucus_Meadowlands, United Stateson-sitefull-timeVerified 13h ago

SeniorJiraConfluenceMicrosoft Office Suite

Senior Signal & Power Integrity Engineer

SG,Singaporefull-timeVerified 13h ago

SeniorCadenceAnsys HFSSSIwaveADS

Sr Physical Design Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SeniorVerilogEDA toolssynthesisfloorplanning

Director, Cache RTL

US,CO,Ft Collins, United Statesfull-timeVerified 13h ago

DirectorVerilogSystemVerilogHDLScripting

Senior Manager - System Validation

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior20+ yrsBIOSUEFIfirmwaredrivers

Principal Program Manager

US,WA,Seattle, United Statesfull-timeVerified 13h ago

Lead

Silicon Design Engineer

SG,Singaporefull-timeVerified 13h ago

VerilogSystemVerilogVCSVerdi

ASIC Verification Engineer, AI Networking IP

CA,ON,Ottawa, Canadafull-timeVerified 13h ago

SystemVerilogUVMCC++

Sr. Microprocessor Verification Engineer

US,NY,Fishkill, United Stateson-sitefull-timeVerified 13h ago

SeniorC++Cx86 assemblyC/C++

Lead FPGA Timing & Characterization Silicon Design Engineer

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead10+ yrsPythonPerlTclVivado

Director of Debug

US,WA,Seattle, United Statesfull-timeVerified 13h ago

DirectorEPYCGPUAIfirmware

Staff/Principal Robotics Validation Engineer

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Lead12+ yrsPyTorchTensorFlowONNX RuntimeROCm/HIP

Senior Staff Component Supplier Quality Engineer

US,CA,San Jose, United Statesfull-timeVerified 13h ago

LeadSix Sigmaprocess capability analysismeasurement system analysisGRR

Product Development Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadPythonC++Bash

Lead Firmware Software Engineer in Multimedia / Camera

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead14+ yrsCARM Cortex-R52SafeRTOSDMA

Senior Component Supplier Quality Engineer

US,CA,San Jose, United Statesfull-timeVerified 13h ago

Senior

CPU Design Verification Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SystemVerilogCC++Universal Verification Methodology

Mask Layout Designer

US,CA,Home Office_Area2, United Statesfull-timeVerified 13h ago

SeniorDRCLVSSkillPerl

Senior Staff Component Supplier Quality Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

Lead

Principal Product Development Engineer (Program Management)

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

Lead

CPU Core Physical Design Engineer

GB,Cambridge, United Kingdomfull-timeVerified 13h ago

Senior5+ yrsDRCLVSPhysical Design toolscustom circuit design

ROCm Support SW Developer

TW,Taipei_Nangang, Taiwanon-sitefull-timeVerified 13h ago

C/C++LinuxPythonGPU programming

Staff Silicon Design Engineer

IE,Dublin, Irelandfull-timeVerified 13h ago

LeadVerilogPythonCMOSSerDes

RTL Design Engineer - PCIE, Ethernet, USB and DDR

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior5+ yrsPCIEEthernetUSBDDR

RTL Design Engineer - PCIE, Ethernet, USB and DDR

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Senior5+ yrsPCIEDDRUSBEthernet

Senior Component Supplier Quality Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorSix Sigma

Solution Architect, FPGA/SoC - AECG

US,CA,San Jose, United Statesfull-timeVerified 13h ago

LeadVivadoVitisPCIeDDR

Physical Design Engineer

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

Mid4+ yrsLibBuilderMemViewNDMLiberty (.lib)

Advanced SMT Process Development Engineer

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

LeadMinitabJMPMentor GraphicsCadence Allegro

Firmware Engineer-Multimedia Software

CN,Shanghai-B49, Chinaon-sitefull-timeVerified 13h ago

Senior8+ yrsCC++LinuxGit

Lead Software Development Engineer - NVMe/ VirtIO/SCSI/FCP/ iSCSI/RDMA or TCP

IN,Bangalore-Technostar B1, Indiaon-sitefull-timeVerified 13h ago

LeadC/C++NVMeNVMe-oFVirtIO

RAS Architect

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorCC++Linux

System Architect – Industrial Robotics and Healthcare

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

SeniorC/C++Pythonembedded LinuxYocto

Software Development Engineer in Test - AI Platform

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

PythonGitHubWindowsLinux

Sr Software Robotics Development Engineer

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

SeniorROSROS 2CC++

Software Development Test Engineer Lead AI Platform

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

LeadPCIeSR-IOVoptical transceiver validation tools

SR Design Verification Engineer

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SeniorSystemVerilogUVMVCSVerdi

Serdes Silicon Design and Micro-Architecture Engineer

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

Leadanalog/mixed-signal circuit designtransceiver micro-architectureDSPCDR

Sr. Program Manager, Customer Program Management -Data Center GPU

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

SeniorROCmLinuxGPUAI

Substrate Process & Test Technology Development

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadABF (Ajinomoto Buildup Film) substratesHDI (high density interconnect) technologiesfine-line processesadvanced via structures

Systems Design Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

Senior7+ yrsVerilogCC++assembly

Sr Software Robotics Development Engineer

IN,Bangalore-Technostar B1, Indiafull-timeVerified 13h ago

SeniorROSROS2C/C++Gazebo

Principal Software Commercialization Program Manager

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

LeadJIRAConfluenceMicrosoft ProjectExcel

RTL Design Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

VerilogSystemVerilogPythonTcl

Pre-Silicon Power Management Engineer

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorVerilogCC++assembly

Chip Lead

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

LeadVerilogVHDLSystemVerilogEDA tools

Senior Staff Silicon Design Engineer - SerDes Validation

SG,Singaporeon-sitefull-timeVerified 13h ago

LeadPythonC/C++TCLMATLAB

Software Development Engineer - AI Workload Optimization

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadPyTorchJAXvLLMSGLang

OSAT Execution Program Manager

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

MidMS OfficeMS ProjectMS SharePoint

Software Development Engineer - Triton Kernel Development

BR,Sao Paulo, Brazilfull-timeVerified 13h ago

C++PythonHIPCUDA

AI Performance Modeling Engineer

IN,Bangalore-Design Center, Indiafull-timeVerified 13h ago

SeniorC++PythonGPU architectureAI modeling

SOC-Architect

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Senior5+ yrsPCIeEthernet/NetworkingRTLSoC Architecture

Packaging Engineer

TW,Hsinchu-Rant Plaza, Taiwanon-sitefull-timeVerified 13h ago

LeadFMEASPC

Director – Advanced Packaging (Panel-Scale Technologies)

US,TX,Austin, United Statesfull-timeVerified 13h ago

Director

Sr. Staff Distributed Systems Software Engineer, Collectives

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadC++PythonLinuxRCCL

Distributed Systems Software Engineer, Collectives

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

EntryC++PythonLinuxRCCL

Senior Software Development Engineer

RS,Belgrade, Serbiaon-sitetemporaryVerified 13h ago

SeniorCC++ARMRISC-V

Principal Distributed Systems Software Engineer, Collectives

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

LeadC++PythonRCCLNCCL

SR. Software Development Engineer - Triton Kernel Development

BR,Sao Paulo, Brazilfull-timeVerified 13h ago

SeniorC++LinuxTensorFlowPyTorch

Sr Memory PHY Enablement

US,TX,Austin, United Statesfull-timeVerified 13h ago

SeniorPythonLinux

Staff Silicon Design Engineer

RS,Belgrade, Serbiafull-timeVerified 13h ago

LeadSystemVerilogUARTJTAGI2C

Data Center Technician

US,WA,Home Office, United Stateson-sitepart-timeVerified 13h ago

MidIPMIWindows Server OSWinPE OSLinux PXE

Software Development Engineer - AI Workload Optimization

US,WA,Bellevue, United Statesfull-timeVerified 13h ago

LeadPyTorchJAXvLLMSGLang

Memory PHY - Technical Lead

CA,ON,Markham-1CV, Canadaon-sitefull-timeVerified 13h ago

LeadIEEE1500JTAG 1149.xScanmemory BIST

Lead Security firmware engineer

IN,Bangalore-Design Center, Indiafull-timeVerified 13h ago

Lead8+ yrsARMCassembly languageRTOS

Lead Memory Systems Design Engineer

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

LeadDDRLPDDRGDDRPHY

Solutions Architect-FPGA

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

SeniorSystemVerilogVerilogCC++

Sr. Debug Engineer - PCIe/CXL, RAS, Memory

US,TX,Austin, United Statesfull-timeVerified 13h ago

Senior10+ yrsPCIeCXLPythonC++

Senior GPU Performance Engineer - AI Workloads

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

SeniorCUDAHIP/ROCmC++Python

Full Chip Timing Lead

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Lead8+ yrsTCLPerlPythonMakefile

Technical Product Line Manager

US,TX,Austin, United Statesfull-timeVerified 13h ago

Senior

CPU Cores Global Performance Lead

US,CA,Santa Clara, United Statesfull-timeVerified 13h ago

Leadx86-64Armv8Armv9RISC-V

Technical Program Manager in EDA

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Senior8+ yrsDevice DriversFirmwareGraphics technologySOC product development

Product Line Marketing Manager

US,TX,Austin, United Statesfull-timeVerified 13h ago

Senior

DFT - SOC Lead

IN,Bangalore-Technostar B1, Indiaon-sitefull-timeVerified 13h ago

Lead15+ yrsScanMBISTPHYFPGA

Staff Silicon Design Engineer

IE,Dublin, Irelandfull-timeVerified 13h ago

LeadSystemVerilogRTLCDCRDC

Director, CPU Silicon Engineering

US,CO,Ft Collins, United Statesfull-timeVerified 13h ago

DirectorRTLDesign VerificationPhysical DesignDFT

Staff Engineer - SerDes Verification

SG,Singaporefull-timeVerified 13h ago

LeadUVMSystemVerilogVHDLVerilog

Software Development Engineer - GPU Libraries

US,CA,San Jose, United Statesfull-timeVerified 13h ago

C++PythonGPU programmingCUDA

Senior Staff Silicon Design Engineer

MY,Penang, Malaysiaon-sitefull-timeVerified 13h ago

Lead8+ yrsUVMSystemVerilogVerilogPCIe

Manager Sys/Test Validation Eng.

US,TX,Austin, United Statesfull-timeVerified 13h ago

LeadMicrosoft OfficeWindows OS

Director High Speed IO Architecture & Design

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

DirectorSerDesChip-To-ChipIOCMOS

Cloud Solution Architect - Centre of Excellence, Field Application Engineering

TW,Taipei, Taiwanfull-timeVerified 13h ago

Senior8+ yrsPostgreSQLMySQLRedisMongoDB

Linux Kernel & Virtualization Engineer

US,CA,Santa Clara, United Stateson-sitefull-timeVerified 13h ago

PythonCC++Linux

Staff Engineering Technician

US,TX,Austin, United Statespart-timeVerified 13h ago

SeniorLinuxROCmUEFIACPI

Data Center GPU Board Power Validation Engineer

US,TX,Austin, United Stateson-sitefull-timeVerified 13h ago

SeniorPCIeHBMSMC/BMC firmwareOCP

Systems Design Engineer 2

CA,ON,Markham-1CV, Canadafull-timeVerified 13h ago

MidPLDMRedfishSPDMeROT

HPC & AI Researcher Engineer

US,TX,Austin-MET, United Stateson-sitefull-timeVerified 13h ago

SeniorPythonx86 architectureuProfVtune

Sr. Manager, Product Management and Marketing

US,CA,San Jose, United Stateson-sitefull-timeVerified 13h ago

SeniorCPUGPUNPUSOC

GPU Kernel Development Software Engineer

CN,Shanghai-B49, Chinafull-timeVerified 13h ago

SeniorDeep Learning FrameworksLLM FrameworksTensorFlowPyTorch

Packaging Engineer

IN,Bangalore-Technostar B1, Indiaon-sitefull-timeVerified 13h ago

Senior2+ yrsCadence SIP / APDSynopsys 3DICCAI/ML

Embedded Software - System Test Architect

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Senior7–12 yrsARMLinux kernelDriversBaremetal drivers

Staff UEFI/BIOS Development - Customer Application Engineer

IN,Bangalore-Technostar B1, Indiaon-sitefull-timeVerified 13h ago

Lead10+ yrsBIOSUEFIACPISMBIOS

Packaging Engineer

IN,Bangalore-Technostar B1, Indiaon-sitefull-timeVerified 13h ago

Senior2+ yrsCadence SIPAPDSynopsys 3DICCEDA tools

Embedded Software - System Test Architect

IN,Hyderabad-Sattva, Indiafull-timeVerified 13h ago

Senior7–12 yrsPythonCC++Linux

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TW,Taipei, Taiwanfull-timeVerified 13h ago

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US,CA,San Jose, United Statesfull-timeVerified 13h ago

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