Senior Staff Digital Design Engineer

SalaryCHF 113k – CHF 150k

LocationCHE - Neuchatel

Also inNeuchâtel, Switzerland

Typefull-time

SeniorityLead

Experience8+ yrs

DepartmentEngineering

Company size1,001–5,000 people

First seenOct 6, 2026 · 5d ago

Verified live1d ago

At a glanceSummarised by Seekless from the posting.

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field

8+ years of experience in digital IC design, preferably within mixed-signal environments

Strong knowledge of digital IC development, including frontend-to-backend flow, timing closure, and low-power design techniques

Experience with MCU-based architectures (e.g. ARM, RISC-V, STM32) and digital microarchitecture

Proficiency in SystemVerilog, Verilog, or VHDL, along with scripting languages such as Python, Tcl, or Perl

Experience with industry-standard EDA tools (e.g. Synopsys, Cadence, Siemens)

Understanding of verification methodologies (e.g. UVM/OVM, formal verification)

Familiarity with standard hardware interfaces (e.g. I2C, I3C, SPI, MIPI)

Strong analytical, problem-solving, and communication skills

Ability to work independently while collaborating effectively within cross-functional teams

Experience with wireless communication systems (e.g. BLE, IEEE 802.15.4)

Knowledge of transceiver architectures, modulation/demodulation, and signal processing

Exposure to cryptographic block design

Experience with FPGA design and FPGA-based system validation

Familiarity with version control and collaborative development tools (e.g. Git)

Broader understanding of system-level design, including embedded firmware, analog interaction, and modelling

Skills

SystemVerilog

Verilog

VHDL

Python

Tcl

Perl

Synopsys

Cadence

Siemens

UVM

OVM

I2C

I3C

SPI

MIPI

ARM

RISC-V

STM32

Git

BLE

IEEE 802.15.4

FPGA

Location: Neuchâtel, Switzerland

Our Team:

Semtech’s Wireless and LoRa® system teams in Neuchâtel and Grenoble are globally recognised leaders in Low Power Wide Area Network (LPWAN) technology. Our engineers work across the full system stack — from RF and analog design through to digital architecture, protocol development, and cloud connectivity — enabling industry-leading, low-power, long-range wireless solutions.

You will be part of a highly collaborative and innovative environment, contributing to the next generation of LoRa and LoRaWAN system architecture, shaping the future of connected devices across industrial, infrastructure, and consumer markets.

Job Summary:

The Senior Staff Digital Design Engineer is responsible for leading the design and development of digital subsystems within complex mixed-signal ICs, from initial concept through to lab validation.

This role plays a key part in defining digital architectures, implementing high-performance and low-power designs, and collaborating cross-functionally to ensure successful product development and production readiness. The position requires strong technical expertise, problem-solving capability, and the ability to contribute to innovation and continuous improvement within the design team.

Responsibilities:

• Design and implement digital subsystems, including CPU-based architectures, FSMs, interconnects, and peripherals (e.g. I2C, SPI, analog controls) (40%)

• Define and architect digital system blocks, contributing to system-level design decisions and trade-offs (10%)

• Collaborate with analog design teams to define interfaces and ensure seamless mixed-signal integration (10%)

• Debug and analyse RTL and verification issues, identifying root causes and driving resolution (10%)

• Support block-level and chip-level verification activities in collaboration with verification teams (10%)

• Contribute to lab validation, product qualification, and cross-functional engineering efforts with Validation, Test, and Product teams (10%)

• Drive continuous improvement of design methodologies, tools, and overall design quality (10%)

Minimum Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

• 8+ years of experience in digital IC design, preferably within mixed-signal environments

• Strong knowledge of digital IC development, including frontend-to-backend flow, timing closure, and low-power design techniques

• Experience with MCU-based architectures (e.g. ARM, RISC-V, STM32) and digital microarchitecture

• Proficiency in SystemVerilog, Verilog, or VHDL, along with scripting languages such as Python, Tcl, or Perl

• Experience with industry-standard EDA tools (e.g. Synopsys, Cadence, Siemens)

• Understanding of verification methodologies (e.g. UVM/OVM, formal verification)

• Familiarity with standard hardware interfaces (e.g. I2C, I3C, SPI, MIPI)

• Strong analytical, problem-solving, and communication skills

• Ability to work independently while collaborating effectively within cross-functional teams

Desired Qualifications:

• Experience with wireless communication systems (e.g. BLE, IEEE 802.15.4)

• Knowledge of transceiver architectures, modulation/demodulation, and signal processing

• Exposure to cryptographic block design

• Experience with FPGA design and FPGA-based system validation

• Familiarity with version control and collaborative development tools (e.g. Git)

• Broader understanding of system-level design, including embedded firmware, analog interaction, and modelling

Career Growth Philosophy:

At Semtech, we believe that innovation starts with people. We are committed to empowering professional development through mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment.

Our pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities.

Additional Notes:

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job.

Incumbents may be required to perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

A reasonable estimate of the pay range for this position is 112,500 CHF - 150,000 CHF. There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.

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