SoC QoS/Fabric Performance Architect, Platform Architecture
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Before you apply
LocationAustin, Texas, United States; Cambridge, Massachusetts, United States; Cupertino, California, United States
Typefull-time
SenioritySenior
DepartmentHardware
Company size10,000+ people
PostedOct 26, 2026 · 1w ago
Verified live1d ago
At a glanceSummarised by Seekless from the posting.
BS degree
C++ programming experience
Experience in computer architecture and the HW/SW stack
Experience with performance modeling and debugging
20+ years of relevant experience
Examples of substantial HW or SW projects brought to completion
Coursework and/or practical experience with scripting for automation and data visualization
Coursework and/or practical experience with network-on-chip architecture and design is a big plus
Ability to study a problem in depth, design experiments, analyze data, and present results
Experience with Cellular/5G modem architecture
Communication and documentation skills
Skills
C++
Python
About the company
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish!
About the role
In this role, you will be a member of the Platform Architecture team, working with hardware and software engineering groups to shape the architecture of Apple’s future System-on-Chips (SoC). We are seeking an energetic and highly motivated SoC performance engineer to drive development of our on-chip communication interconnect and memory Quality-of-Service features.
Description
You will help create a full-chip C++ simulator for iPhone/iPad/Mac/Watch SoCs. You will model new, emerging workloads such as Augmented Reality (AR) and Machine Learning (ML). You will use these models to study a range of performance and power trade-offs in our SoCs. Your work will be highly visible and critical for driving architecture improvements in Apple’s future products.
Responsibilities
•
Learning about the state of the art in SoC IP and chip-level architecture including network-on-chip
•
C++ modeling of graphics, camera, and ML dataflow, network-on-chip and integration with other SoC models
•
Running performance simulation of future applications
•
Careful analysis and presentation of simulation results
•
Tuning and validating future SoC HW/SW for the best user experience
•
Collaboration with cross-functional modeling, hardware, and software teams
•
Some international travel is required for this position
Minimum qualifications
•
BS degree
•
C++ programming experience
•
Experience in computer architecture and the HW/SW stack
•
Experience with performance modeling and debugging
Preferred qualifications
•
20+ years of relevant experience
•
Examples of substantial HW or SW projects brought to completion
•
Coursework and/or practical experience with scripting for automation and data visualization
•
Coursework and/or practical experience with network-on-chip architecture and design is a big plus
•
Ability to study a problem in depth, design experiments, analyze data, and present results
•
Experience with Cellular/5G modem architecture
•
Communication and documentation skills
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